Comments
Patch
@@ -147,6 +147,15 @@
#define OMAP343X_CONTROL_PBIAS_LITE (OMAP2_CONTROL_GENERAL + 0x02b0)
#define OMAP343X_CONTROL_TEMP_SENSOR (OMAP2_CONTROL_GENERAL + 0x02b4)
+/* OMAP3517/AM3517 only CONTROL_GENERAL register offsets */
+#define OMAP3517_CONTROL_MSUSPENDMUX_6 (OMAP2_CONTROL_GENERAL + 0x0038)
+#define OMAP3517_CONTROL_DEVCONF2 (OMAP2_CONTROL_GENERAL + 0x0310)
+#define OMAP3517_CONTROL_DEVCONF3 (OMAP2_CONTROL_GENERAL + 0x0314)
+#define OMAP3517_CONTROL_CBA_PRIORITY (OMAP2_CONTROL_GENERAL + 0x0320)
+#define OMAP3517_CONTROL_LVL_INTR_CLEAR (OMAP2_CONTROL_GENERAL + 0x0324)
+#define OMAP3517_CONTROL_IP_SW_RESET (OMAP2_CONTROL_GENERAL + 0x0328)
+#define OMAP3517_CONTROL_IP_CLK_CTRL (OMAP2_CONTROL_GENERAL + 0x032C)
+
/* 34xx D2D idle-related pins, handled by PM core */
#define OMAP3_PADCONF_SAD2D_MSTANDBY 0x250
#define OMAP3_PADCONF_SAD2D_IDLEACK 0x254
@@ -238,6 +247,14 @@
#define FEAT_NEON 0
#define FEAT_NEON_NONE 1
+/* OMAP3517_CONTROL_IP_CLK_CTRL bits */
+#define OMAP3517_USBOTG_VBUSP_CLK_SHIFT 0
+#define OMAP3517_CPGMAC_VBUSP_CLK_SHIFT 1
+#define OMAP3517_VPFE_VBUSP_CLK_SHIFT 2
+#define OMAP3517_HECC_VBUSP_CLK_SHIFT 3
+#define OMAP3517_USBOTG_FCLK_SHIFT 8
+#define OMAP3517_CPGMAC_FCLK_SHIFT 9
+#define OMAP3517_VPFE_FCLK_SHIFT 10
#ifndef __ASSEMBLY__
#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
AM3517/05 has a few additional control module registers defined mainly to control the new IP's. This patch adds support for those new registers. Signed-off-by: Ranjith Lohithakshan <ranjithl@ti.com> --- arch/arm/plat-omap/include/plat/control.h | 17 +++++++++++++++++ 1 files changed, 17 insertions(+), 0 deletions(-)