Patchworkβ sh: Account for cache aliases in flush_icache_range()

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Submitter Matt Fleming
Date 2009-11-05 23:14:39
Message ID <1257462879-16865-1-git-send-email-matt@console-pimps.org>
Download mbox | patch
Permalink /patch/57943/
State Accepted
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Comments

Matt Fleming - 2009-11-05 23:14:39
The icache may also contain aliases so we must account for them just
like we do when manipulating the dcache. We usually get away with
aliases in the icache because the instructions that are read from memory
are read-only, i.e. they never change. However, the place where this
bites us is when the code has been modified.

Signed-off-by: Matt Fleming <matt@console-pimps.org>
---
 arch/sh/mm/cache-sh4.c |    5 ++++-
 1 files changed, 4 insertions(+), 1 deletions(-)
Matt Fleming - 2009-11-06 08:02:46
On Thu, Nov 05, 2009 at 11:14:39PM +0000, Matt Fleming wrote:
> The icache may also contain aliases so we must account for them just
> like we do when manipulating the dcache. We usually get away with
> aliases in the icache because the instructions that are read from memory
> are read-only, i.e. they never change. However, the place where this
> bites us is when the code has been modified.
> 

Just to be clear, I haven't actually seen any errors because of this
code. But the fix looks correct to me unless we're never in a state
where we have aliases in the icache (even though in theory we could)?
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Paul Mundt - 2009-11-09 01:49:55
On Thu, Nov 05, 2009 at 11:14:39PM +0000, Matt Fleming wrote:
> The icache may also contain aliases so we must account for them just
> like we do when manipulating the dcache. We usually get away with
> aliases in the icache because the instructions that are read from memory
> are read-only, i.e. they never change. However, the place where this
> bites us is when the code has been modified.
> 
> Signed-off-by: Matt Fleming <matt@console-pimps.org>

Looks reasonable to me, I've applied it.
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Patch

diff --git a/arch/sh/mm/cache-sh4.c b/arch/sh/mm/cache-sh4.c
index b5abe94..6bfd08d 100644
--- a/arch/sh/mm/cache-sh4.c
+++ b/arch/sh/mm/cache-sh4.c
@@ -65,6 +65,7 @@  static void __uses_jump_to_uncached sh4_flush_icache_range(void *args)
 
 	for (v = start; v < end; v += L1_CACHE_BYTES) {
 		unsigned long icacheaddr;
+		int j, n;
 
 		__ocbwb(v);
 
@@ -72,8 +73,10 @@  static void __uses_jump_to_uncached sh4_flush_icache_range(void *args)
 				cpu_data->icache.entry_mask);
 
 		/* Clear i-cache line valid-bit */
+		n = boot_cpu_data.icache.n_aliases;
 		for (i = 0; i < cpu_data->icache.ways; i++) {
-			__raw_writel(0, icacheaddr);
+			for (j = 0; j < n; j++)
+				__raw_writel(0, icacheaddr + (j * PAGE_SIZE));
 			icacheaddr += cpu_data->icache.way_incr;
 		}
 	}