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[v2,4/5] MIPS: cavium-octeon: Execute the smp handle after jumping to kernel linked address

Message ID 1618230494-6207-5-git-send-email-hejinyang@loongson.cn (mailing list archive)
State New
Headers show
Series MIPS: relocate: Add automatic relocation to CONFIG_RELOCATABLE | expand

Commit Message

Jinyang He April 12, 2021, 12:28 p.m. UTC
Once relocation is required, some fixed addresses in `smp handle` will be
affected. For example, octeon_processor_relocated_kernel_entry may cause
the problem of loading wrong memory at old address.

This patch makes smp cpu do two more things, one is to set ST0_KX, another
is to jump to the kernel linked address. They will not destroy the
cavium-octeon platform. This patch adds two platform-related macros,
SMP_IN_KERNEL_ENTRY and smp_in_kernel_handle, which can be used on other
platforms to deal with the SMP CPU in the kernel_entry, if the smp CPU
entered the kernel entry.

Signed-off-by: Jinyang He <hejinyang@loongson.cn>
---
 arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h | 7 +++++++
 arch/mips/kernel/head.S                                      | 4 ++++
 2 files changed, 11 insertions(+)
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Patch

diff --git a/arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h b/arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h
index e66767d..21b9854 100644
--- a/arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h
+++ b/arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h
@@ -86,6 +86,13 @@ 
 	dli	v0, 0x27
 	dmtc0	v0, CP0_DCACHE_ERR_REG
 1:
+	.set pop
+.endm
+
+#define SMP_IN_KERNEL_ENTRY
+.macro	smp_in_kernel_entry_handle
+	.set push
+	.set arch=octeon
 	# Get my core id
 	rdhwr	v0, $0
 	# Jump the master to kernel_entry
diff --git a/arch/mips/kernel/head.S b/arch/mips/kernel/head.S
index 0186285..6cfe23e 100644
--- a/arch/mips/kernel/head.S
+++ b/arch/mips/kernel/head.S
@@ -104,6 +104,10 @@  NESTED(kernel_entry, 16, sp)			# kernel entry point
 	jr		t0
 2:
 
+#ifdef SMP_IN_KERNEL_ENTRY
+	smp_in_kernel_entry_handle
+#endif
+
 	PTR_LA		t0, __bss_start		# clear .bss
 	LONG_S		zero, (t0)
 	PTR_LA		t1, __bss_stop - LONGSIZE