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This bundle contains patches for the cxl project.

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Show patches with: Archived = No       |   39 patches
Patch Series A/R/T S/W/F Date Submitter Delegate State
[v2] cxl/region: Fix region creation for greater than x2 switches [v2] cxl/region: Fix region creation for greater than x2 switches - 1 1 --- 2024-12-09 Dan Williams Accepted
[1/1] cxl/pci: Check dport->regs.rcd_pcie_cap availability before accessing [1/1] cxl/pci: Check dport->regs.rcd_pcie_cap availability before accessing - 2 - --- 2024-11-29 Li Ming Accepted
cxl/pci: Fix potential bogus return value upon successful probing cxl/pci: Fix potential bogus return value upon successful probing - 1 - --- 2024-11-14 Davidlohr Bueso Superseded
[RFC] cxl/region: Fix region creation for greater than x2 switches [RFC] cxl/region: Fix region creation for greater than x2 switches - - 1 --- 2024-10-27 Ye, Huaisheng Superseded
[v2,6/6] cxl/test: Improve init-order fidelity relative to real-world systems cxl: Initialization and shutdown fixes - 2 - --- 2024-10-23 Dan Williams Accepted
[v2,5/6] cxl/port: Prevent out-of-order decoder allocation cxl: Initialization and shutdown fixes - 2 - --- 2024-10-23 Dan Williams Accepted
[v2,4/6] cxl/port: Fix use-after-free, permit out-of-order decoder shutdown cxl: Initialization and shutdown fixes - 2 - --- 2024-10-23 Dan Williams Accepted
[v2,3/6] cxl/acpi: Ensure ports ready at cxl_acpi_probe() return cxl: Initialization and shutdown fixes - 2 1 --- 2024-10-23 Dan Williams Accepted
[v2,2/6] cxl/port: Fix cxl_bus_rescan() vs bus_rescan_devices() cxl: Initialization and shutdown fixes - 2 1 --- 2024-10-23 Dan Williams Accepted
[v2,1/6] cxl/port: Fix CXL port initialization order when the subsystem is built-in cxl: Initialization and shutdown fixes - 3 2 --- 2024-10-23 Dan Williams Accepted
testing/cxl: Fix abused pci_bus_read_config_word() on platform device testing/cxl: Fix abused pci_bus_read_config_word() on platform device - 1 1 --- 2024-10-16 Zhijian Li (Fujitsu) Superseded
[1/1] cxl/events: Fix Trace DRAM Event Record [1/1] cxl/events: Fix Trace DRAM Event Record - 1 - --- 2024-10-14 Shiju Jose Accepted
[5/5] cxl/test: Improve init-order fidelity relative to real-world systems cxl: Initialization and shutdown fixes - - - --- 2024-10-11 Dan Williams Superseded
[4/5] cxl/port: Fix use-after-free, permit out-of-order decoder shutdown cxl: Initialization and shutdown fixes - 1 - --- 2024-10-11 Dan Williams Superseded
[3/5] cxl/acpi: Ensure ports ready at cxl_acpi_probe() return cxl: Initialization and shutdown fixes - - - --- 2024-10-11 Dan Williams Superseded
[2/5] cxl/port: Fix cxl_bus_rescan() vs bus_rescan_devices() cxl: Initialization and shutdown fixes - - - --- 2024-10-11 Dan Williams Superseded
[1/5] cxl/port: Fix CXL port initialization order when the subsystem is built-in cxl: Initialization and shutdown fixes - - 1 --- 2024-10-11 Dan Williams Superseded
[v2] cxl/core/port: defer endpoint probes when ACPI likely hasn't finished [v2] cxl/core/port: defer endpoint probes when ACPI likely hasn't finished - - - --- 2024-10-04 Gregory Price iweiny Rejected
[RESEND] EINJ, CXL: Fix CXL device SBDF calculation [RESEND] EINJ, CXL: Fix CXL device SBDF calculation - 2 1 --- 2024-09-27 Ben Cheatham Accepted
[v2] cxl/region: Fix bad logic for finding a free switch cxl decoder [v2] cxl/region: Fix bad logic for finding a free switch cxl decoder - - - --- 2024-09-05 Zijun Hu Rejected
cxl/region: Fix logic for finding a free cxl decoder cxl/region: Fix logic for finding a free cxl decoder - - - --- 2024-09-03 Zijun Hu Handled Elsewhere
[v4,4/4] cxl/pci: simplify the check of mem_enabled in cxl_hdm_decode_init() cxl: Fixes for hdm decoder initialization from DVSEC ranges - 2 - --- 2024-08-28 Yanfei Xu Accepted
[v4,3/4] cxl/pci: Check Mem_info_valid bit for each applicable DVSEC cxl: Fixes for hdm decoder initialization from DVSEC ranges - 2 - --- 2024-08-28 Yanfei Xu Accepted
[v4,2/4] cxl/pci: Remove duplicated implementation of waiting for memory_info_valid cxl: Fixes for hdm decoder initialization from DVSEC ranges - 2 - --- 2024-08-28 Yanfei Xu Accepted
[v4,1/4] cxl/pci: Fix to record only non-zero ranges cxl: Fixes for hdm decoder initialization from DVSEC ranges - 2 - --- 2024-08-28 Yanfei Xu Accepted
[v2] cxl/region: Remove lock from memory notifier callback [v2] cxl/region: Remove lock from memory notifier callback - 3 - --- 2024-08-14 Ira Weiny Superseded
cxl/region: Remove lock from memory notifier callback cxl/region: Remove lock from memory notifier callback - - - --- 2024-08-13 Ira Weiny Superseded
[v3,4/4] cxl/pci: simplify the check of mem_enabled in cxl_hdm_decode_init() Fixes for hdm docoder initialization from DVSEC ranges - 1 - --- 2024-08-13 Yanfei Xu Superseded
[v3,3/4] cxl/pci: Check Mem_info_valid bit for each applicable DVSEC Fixes for hdm docoder initialization from DVSEC ranges - 1 - --- 2024-08-13 Yanfei Xu Superseded
[v3,2/4] cxl/pci: Remove duplicated implementation of waiting for memory_info_valid Fixes for hdm docoder initialization from DVSEC ranges - 1 - --- 2024-08-13 Yanfei Xu Superseded
[v3,1/4] cxl/pci: Fix to record only non-zero ranges Fixes for hdm docoder initialization from DVSEC ranges - 1 - --- 2024-08-13 Yanfei Xu Superseded
[v2,2/2] cxl/test: Skip cxl_setup_parent_dport() for emulated dports Fix get a wrong pci host bridge in cxl_setup_parent_dport() - - - --- 2024-08-09 Li, Ming4 Accepted
[v2,1/2] cxl/pci: Get AER capability address from RCRB only for RCH dport Fix get a wrong pci host bridge in cxl_setup_parent_dport() - - - --- 2024-08-09 Li, Ming4 Accepted
cxl/pci: Fix DVSEC ranges validation to cover all ranges cxl/pci: Fix DVSEC ranges validation to cover all ranges - - - --- 2024-08-07 Yanfei Xu Superseded
[1/1] cxl/pci: Get AER capability address from RCRB only for RCH dport [1/1] cxl/pci: Get AER capability address from RCRB only for RCH dport - - 1 --- 2024-08-06 Li, Ming4 Changes Requested
cxl core:wrong value of macro definition cxl core:wrong value of macro definition - - - --- 2024-07-08 peng guo Accepted
[v7,1/5] cxl: Remove checking of iter in cxl_endpoint_get_perf_coordinates() cxl: access_coordinate validity fixes for 6.9 - 3 - --- 2024-04-03 Dave Jiang Accepted
[v2,1/1] cxl/core: Fix initialization of mbox_cmd.size_out in get event cxl/core: Fix initialization of mbox_cmd.size_out in get event - 2 1 --- 2024-04-02 Kwangjin Ko Accepted
cxl/core/regs: Fix usage of map->reg_type in cxl_decode_regblock() before assigned cxl/core/regs: Fix usage of map->reg_type in cxl_decode_regblock() before assigned - 2 - --- 2024-03-19 Dave Jiang Accepted