Message ID | 1409061028-5087-1-git-send-email-arun.siluvery@linux.intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On Tue, Aug 26, 2014 at 02:50:28PM +0100, Arun Siluvery wrote: > Some of the workarounds are lost followed by a gpu reset, suspend/resume; > this patch adds a test which compares register state before and after > the test scenario. > > This test currently verifies only bdw workarounds. > > v2: address patch cleanup comments (ThomasW) > Add binary to ignore list and use igt_debugfs helper fns > to read debugfs file and igt_info for printing debug info. > > v2.1: address minor comments from Daniel > use igt_main as opposed to normal main > > Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com> > --- > tests/.gitignore | 1 + > tests/Makefile.sources | 1 + > tests/gem_workarounds.c | 233 ++++++++++++++++++++++++++++++++++++++++++++++++ > 3 files changed, 235 insertions(+) > create mode 100644 tests/gem_workarounds.c > > diff --git a/tests/.gitignore b/tests/.gitignore > index 985afbd..1103e2e 100644 > --- a/tests/.gitignore > +++ b/tests/.gitignore > @@ -97,20 +97,21 @@ gem_tiled_fence_blits > gem_tiled_partial_pwrite_pread > gem_tiled_pread > gem_tiled_pread_pwrite > gem_tiled_swapping > gem_tiling_max_stride > gem_unfence_active_buffers > gem_unref_active_buffers > gem_userptr_blits > gem_wait_render_timeout > gem_write_read_ring_switch > +gem_workarounds > gen3_mixed_blits > gen3_render_linear_blits > gen3_render_mixed_blits > gen3_render_tiledx_blits > gen3_render_tiledy_blits > gen7_forcewake_mt > igt_fork_helper > igt_list_only > igt_no_exit > igt_no_exit_list_only > diff --git a/tests/Makefile.sources b/tests/Makefile.sources > index 0eb9369..a17acd1 100644 > --- a/tests/Makefile.sources > +++ b/tests/Makefile.sources > @@ -127,20 +127,21 @@ TESTS_progs = \ > gem_storedw_loop_vebox \ > gem_threaded_access_tiled \ > gem_tiled_fence_blits \ > gem_tiled_pread \ > gem_tiled_pread_pwrite \ > gem_tiled_swapping \ > gem_tiling_max_stride \ > gem_unfence_active_buffers \ > gem_unref_active_buffers \ > gem_wait_render_timeout \ > + gem_workarounds \ > gen3_mixed_blits \ > gen3_render_linear_blits \ > gen3_render_mixed_blits \ > gen3_render_tiledx_blits \ > gen3_render_tiledy_blits \ > gen7_forcewake_mt \ > kms_force_connector \ > kms_sink_crc_basic \ > kms_fence_pin_leak \ > pm_psr \ > diff --git a/tests/gem_workarounds.c b/tests/gem_workarounds.c > new file mode 100644 > index 0000000..91c2aeb > --- /dev/null > +++ b/tests/gem_workarounds.c > @@ -0,0 +1,233 @@ > +/* > + * Copyright © 2014 Intel Corporation > + * > + * Permission is hereby granted, free of charge, to any person obtaining a > + * copy of this software and associated documentation files (the "Software"), > + * to deal in the Software without restriction, including without limitation > + * the rights to use, copy, modify, merge, publish, distribute, sublicense, > + * and/or sell copies of the Software, and to permit persons to whom the > + * Software is furnished to do so, subject to the following conditions: > + * > + * The above copyright notice and this permission notice (including the next > + * paragraph) shall be included in all copies or substantial portions of the > + * Software. > + * > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR > + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, > + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL > + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER > + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING > + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS > + * IN THE SOFTWARE. > + * > + * Authors: > + * Arun Siluvery <arun.siluvery@linux.intel.com> > + * > + */ > + > +#define _GNU_SOURCE > +#include <stdbool.h> > +#include <unistd.h> > +#include <stdlib.h> > +#include <stdio.h> > +#include <string.h> > +#include <fcntl.h> > +#include <inttypes.h> > +#include <errno.h> > +#include <sys/stat.h> > +#include <sys/ioctl.h> > +#include <sys/mman.h> > +#include <time.h> > +#include <signal.h> > + > +#include "ioctl_wrappers.h" > +#include "drmtest.h" > +#include "igt_debugfs.h" > +#include "igt_aux.h" > +#include "intel_chipset.h" > +#include "intel_io.h" > + > +enum operation { > + GPU_RESET = 0x01, > + SUSPEND_RESUME = 0x02, > +}; > + > +struct intel_wa_reg { > + uint32_t addr; > + uint32_t value; > + uint32_t mask; > +}; > + > +int drm_fd; > +uint32_t devid; > +static drm_intel_bufmgr *bufmgr; > +struct intel_batchbuffer *batch; > +int num_wa_regs; > +struct intel_wa_reg *wa_regs; > + > + > +static void test_hang_gpu(void) > +{ > + int retry_count = 30; > + enum stop_ring_flags flags; > + struct drm_i915_gem_execbuffer2 execbuf; > + struct drm_i915_gem_exec_object2 gem_exec; > + uint32_t b[2] = {MI_BATCH_BUFFER_END}; > + > + igt_assert(retry_count); > + igt_set_stop_rings(STOP_RING_DEFAULTS); > + > + memset(&gem_exec, 0, sizeof(gem_exec)); > + gem_exec.handle = gem_create(drm_fd, 4096); > + gem_write(drm_fd, gem_exec.handle, 0, b, sizeof(b)); > + > + memset(&execbuf, 0, sizeof(execbuf)); > + execbuf.buffers_ptr = (uintptr_t)&gem_exec; > + execbuf.buffer_count = 1; > + execbuf.batch_len = sizeof(b); > + > + drmIoctl(drm_fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf); > + > + while(retry_count--) { > + flags = igt_get_stop_rings(); > + if (flags == 0) > + break; > + igt_info("gpu hang not yet cleared, retries left %d\n", retry_count); > + sleep(1); > + } > + > + flags = igt_get_stop_rings(); > + if (flags) > + igt_set_stop_rings(STOP_RING_NONE); > +} > + > +static void test_suspend_resume(void) > +{ > + igt_info("Suspending the device ...\n"); > + igt_system_suspend_autoresume(); > +} > + > +static void get_current_wa_data(struct intel_wa_reg **curr, int num) > +{ > + int i; > + struct intel_wa_reg *ptr = NULL; > + > + ptr = *curr; > + > + intel_register_access_init(intel_get_pci_device(), 0); > + > + for (i = 0; i < num; ++i) { > + ptr[i].addr = wa_regs[i].addr; > + ptr[i].value = intel_register_read(wa_regs[i].addr); > + ptr[i].mask = wa_regs[i].mask; > + } > + > + intel_register_access_fini(); > +} > + > +static void check_workarounds(enum operation op, int num) > +{ > + int i; > + int fail_count = 0; > + int status = 0; > + struct intel_wa_reg *current_wa = NULL; > + > + switch (op) { > + case GPU_RESET: > + test_hang_gpu(); > + break; > + > + case SUSPEND_RESUME: > + test_suspend_resume(); > + break; > + > + default: > + fail_count = 1; > + goto out; > + } > + > + current_wa = malloc(num * sizeof(*current_wa)); > + igt_assert(current_wa); > + get_current_wa_data(¤t_wa, num); > + > + igt_info("Address\tbefore\t\tafter\t\tw/a mask\tresult\n"); > + for (i = 0; i < num; ++i) { > + status = (current_wa[i].value & current_wa[i].mask) != > + (wa_regs[i].value & wa_regs[i].mask); > + if (status) > + ++fail_count; > + > + igt_info("0x%X\t0x%08X\t0x%08X\t0x%08X\t%s\n", > + current_wa[i].addr, wa_regs[i].value, > + current_wa[i].value, current_wa[i].mask, > + status ? "fail" : "success"); > + } > + > +out: > + free(current_wa); > + igt_assert(fail_count == 0); > +} > + > +igt_main > +{ > + igt_fixture { > + int i; > + int fd; > + int ret; > + FILE *file; > + char *line = NULL; > + size_t line_size; > + > + drm_fd = drm_open_any(); > + > + bufmgr = drm_intel_bufmgr_gem_init(drm_fd, 4096); > + devid = intel_get_drm_devid(drm_fd); > + batch = intel_batchbuffer_alloc(bufmgr, devid); > + > + fd = igt_debugfs_open("intel_wa_registers", O_RDONLY); > + igt_assert(fd >= 0); > + > + file = fdopen(fd, "r"); > + igt_assert(file > 0); > + > + ret = getline(&line, &line_size, file); > + igt_assert(ret > 0); > + sscanf(line, "Workarounds applied: %d", &num_wa_regs); > + igt_assert(num_wa_regs > 0); > + > + wa_regs = malloc(num_wa_regs * sizeof(*wa_regs)); > + > + i = 0; > + while(getline(&line, &line_size, file) > 0) { > + sscanf(line, "0x%X: 0x%08X, mask: 0x%08X", > + &wa_regs[i].addr, &wa_regs[i].value, > + &wa_regs[i].mask); > + ++i; > + } > + > + free(line); > + fclose(file); > + close(fd); > + } > + > + igt_subtest("check-workaround-data-after-reset") { > + if (IS_BROADWELL(devid)) > + check_workarounds(GPU_RESET, num_wa_regs); > + else > + igt_skip_on("No Workaround table available!!\n"); > + } > + > + igt_subtest("check-workaround-data-after-suspend-resume") { > + if (IS_BROADWELL(devid)) > + check_workarounds(SUSPEND_RESUME, num_wa_regs); > + else > + igt_skip_on("No Workaround table available!!\n"); > + } > + > + igt_fixture { > + free(wa_regs); > + close(drm_fd); > + } > + > + igt_exit(); igt_exit is already in igt_main, so I've dropped it. Otherwise looked sane, thanks for the patch. -Daniel > +} > -- > 2.0.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
On Wed, Aug 27, 2014 at 05:50:16PM +0200, Daniel Vetter wrote: > On Tue, Aug 26, 2014 at 02:50:28PM +0100, Arun Siluvery wrote: > > Some of the workarounds are lost followed by a gpu reset, suspend/resume; > > this patch adds a test which compares register state before and after > > the test scenario. > > > > This test currently verifies only bdw workarounds. The existing tool didn't need kernel help (other than forcewake). Why was that not used as a starting point? -Chris
On 27/08/2014 16:59, Chris Wilson wrote: > On Wed, Aug 27, 2014 at 05:50:16PM +0200, Daniel Vetter wrote: >> On Tue, Aug 26, 2014 at 02:50:28PM +0100, Arun Siluvery wrote: >>> Some of the workarounds are lost followed by a gpu reset, suspend/resume; >>> this patch adds a test which compares register state before and after >>> the test scenario. >>> >>> This test currently verifies only bdw workarounds. > > The existing tool didn't need kernel help (other than forcewake). Why > was that not used as a starting point? > -Chris > Do you mean intel_reg_checker()? This new test uses kernel help to get the initial state of workarounds which are exported to debugfs. We could add this known state to the test itself but Daniel is not ok with that. debugfs part is only added to support the test. regards Arun
On Wed, Aug 27, 2014 at 05:17:11PM +0100, Siluvery, Arun wrote: > On 27/08/2014 16:59, Chris Wilson wrote: > >On Wed, Aug 27, 2014 at 05:50:16PM +0200, Daniel Vetter wrote: > >>On Tue, Aug 26, 2014 at 02:50:28PM +0100, Arun Siluvery wrote: > >>>Some of the workarounds are lost followed by a gpu reset, suspend/resume; > >>>this patch adds a test which compares register state before and after > >>>the test scenario. > >>> > >>>This test currently verifies only bdw workarounds. > > > >The existing tool didn't need kernel help (other than forcewake). Why > >was that not used as a starting point? > >-Chris > > > Do you mean intel_reg_checker()? > This new test uses kernel help to get the initial state of > workarounds which are exported to debugfs. We could add this known > state to the test itself but Daniel is not ok with that. debugfs > part is only added to support the test. I disagree vehemently with Daniel here then. The kernel lies. -Chris
On 27/08/2014 17:23, Chris Wilson wrote: > On Wed, Aug 27, 2014 at 05:17:11PM +0100, Siluvery, Arun wrote: >> On 27/08/2014 16:59, Chris Wilson wrote: >>> On Wed, Aug 27, 2014 at 05:50:16PM +0200, Daniel Vetter wrote: >>>> On Tue, Aug 26, 2014 at 02:50:28PM +0100, Arun Siluvery wrote: >>>>> Some of the workarounds are lost followed by a gpu reset, suspend/resume; >>>>> this patch adds a test which compares register state before and after >>>>> the test scenario. >>>>> >>>>> This test currently verifies only bdw workarounds. >>> >>> The existing tool didn't need kernel help (other than forcewake). Why >>> was that not used as a starting point? >>> -Chris >>> >> Do you mean intel_reg_checker()? >> This new test uses kernel help to get the initial state of >> workarounds which are exported to debugfs. We could add this known >> state to the test itself but Daniel is not ok with that. debugfs >> part is only added to support the test. > > I disagree vehemently with Daniel here then. The kernel lies. > -Chris > Just to clarify, he was not ok because the list we maintain in the test can get out of sync with the workarounds we apply in the driver which can be avoided if it is generated by the kernel itself. It may be ok to maintain the list in the test in this case considering the list is fairly small but it is not my call. regards Arun
On Wed, Aug 27, 2014 at 06:02:15PM +0100, Siluvery, Arun wrote: > On 27/08/2014 17:23, Chris Wilson wrote: > >On Wed, Aug 27, 2014 at 05:17:11PM +0100, Siluvery, Arun wrote: > >>On 27/08/2014 16:59, Chris Wilson wrote: > >>>On Wed, Aug 27, 2014 at 05:50:16PM +0200, Daniel Vetter wrote: > >>>>On Tue, Aug 26, 2014 at 02:50:28PM +0100, Arun Siluvery wrote: > >>>>>Some of the workarounds are lost followed by a gpu reset, suspend/resume; > >>>>>this patch adds a test which compares register state before and after > >>>>>the test scenario. > >>>>> > >>>>>This test currently verifies only bdw workarounds. > >>> > >>>The existing tool didn't need kernel help (other than forcewake). Why > >>>was that not used as a starting point? > >>>-Chris > >>> > >>Do you mean intel_reg_checker()? > >>This new test uses kernel help to get the initial state of > >>workarounds which are exported to debugfs. We could add this known > >>state to the test itself but Daniel is not ok with that. debugfs > >>part is only added to support the test. > > > >I disagree vehemently with Daniel here then. The kernel lies. > >-Chris > > > Just to clarify, he was not ok because the list we maintain in the > test can get out of sync with the workarounds we apply in the driver > which can be avoided if it is generated by the kernel itself. Test driven development would suggest that the test itself maintains its list. Something I heard Daniel say himself before ;-) > It may be ok to maintain the list in the test in this case > considering the list is fairly small but it is not my call. The best thing about independent testing is that it is independent... -Chris
On Wed, Aug 27, 2014 at 06:52:57PM +0100, Chris Wilson wrote: > > Just to clarify, he was not ok because the list we maintain in the > > test can get out of sync with the workarounds we apply in the driver > > which can be avoided if it is generated by the kernel itself. > > Test driven development would suggest that the test itself maintains its > list. Something I heard Daniel say himself before ;-) > > > It may be ok to maintain the list in the test in this case > > considering the list is fairly small but it is not my call. > > The best thing about independent testing is that it is independent... Well also depends on what you're testing I suppose. It's hard enough to have a complete list of W/As, so two of them is bound to end up in tears. If we are testing that the list of W/As the kernel knows about is indeed applied correctly at init/reset/suspend resume, that's already a good step. Also, that second list in i-g-t is not going to be implemented in complete independence from the kernel tree, it's likely to be the same person doing both sides, ending up copy/pasting a file anyway, no value in doing that. The two lists argument works well if 2 different engineers/teams implement the 2 sides, effective cross-checking the list of W/As as a result, but we don't quite have the people to do that.
On Wed, Aug 27, 2014 at 11:30:35PM +0100, Damien Lespiau wrote: > On Wed, Aug 27, 2014 at 06:52:57PM +0100, Chris Wilson wrote: > > > Just to clarify, he was not ok because the list we maintain in the > > > test can get out of sync with the workarounds we apply in the driver > > > which can be avoided if it is generated by the kernel itself. > > > > Test driven development would suggest that the test itself maintains its > > list. Something I heard Daniel say himself before ;-) > > > > > It may be ok to maintain the list in the test in this case > > > considering the list is fairly small but it is not my call. > > > > The best thing about independent testing is that it is independent... > > Well also depends on what you're testing I suppose. It's hard enough to > have a complete list of W/As, so two of them is bound to end up in > tears. If we are testing that the list of W/As the kernel knows about is > indeed applied correctly at init/reset/suspend resume, that's already a > good step. > > Also, that second list in i-g-t is not going to be implemented in > complete independence from the kernel tree, it's likely to be the same > person doing both sides, ending up copy/pasting a file anyway, no value > in doing that. The two lists argument works well if 2 different > engineers/teams implement the 2 sides, effective cross-checking the list > of W/As as a result, but we don't quite have the people to do that. The point of the independent test is more that you can ask people to run and see if it reports strange things on unknown kernels that might explain bugs. There has to be an external list anyway just so that you can check off the appropriate w/a. Putting that second list in the kernel just leads to bugs in the kernel as aptly demonstrated by the patch and doesn't lead to those warm fuzzy feelings. -Chris
On Thu, Aug 28, 2014 at 06:55:37AM +0100, Chris Wilson wrote: > On Wed, Aug 27, 2014 at 11:30:35PM +0100, Damien Lespiau wrote: > > On Wed, Aug 27, 2014 at 06:52:57PM +0100, Chris Wilson wrote: > > > > Just to clarify, he was not ok because the list we maintain in the > > > > test can get out of sync with the workarounds we apply in the driver > > > > which can be avoided if it is generated by the kernel itself. > > > > > > Test driven development would suggest that the test itself maintains its > > > list. Something I heard Daniel say himself before ;-) > > > > > > > It may be ok to maintain the list in the test in this case > > > > considering the list is fairly small but it is not my call. > > > > > > The best thing about independent testing is that it is independent... > > > > Well also depends on what you're testing I suppose. It's hard enough to > > have a complete list of W/As, so two of them is bound to end up in > > tears. If we are testing that the list of W/As the kernel knows about is > > indeed applied correctly at init/reset/suspend resume, that's already a > > good step. > > > > Also, that second list in i-g-t is not going to be implemented in > > complete independence from the kernel tree, it's likely to be the same > > person doing both sides, ending up copy/pasting a file anyway, no value > > in doing that. The two lists argument works well if 2 different > > engineers/teams implement the 2 sides, effective cross-checking the list > > of W/As as a result, but we don't quite have the people to do that. > > The point of the independent test is more that you can ask people to run > and see if it reports strange things on unknown kernels that might > explain bugs. There has to be an external list anyway just so that you > can check off the appropriate w/a. > > Putting that second list in the kernel just leads to bugs in the kernel > as aptly demonstrated by the patch and doesn't lead to those warm fuzzy > feelings. Ah, fair, for those points it'd be ok to just isolate the W/As in a file, decide that the master copy is in the kernel and sync it from the kernel to i-g-t when it changes. Not the full "independent" testing I was thinking about with separate people writing code and validation.
On Tue, Aug 26, 2014 at 02:50:28PM +0100, Arun Siluvery wrote: > + igt_subtest("check-workaround-data-after-suspend-resume") { > + if (IS_BROADWELL(devid)) > + check_workarounds(SUSPEND_RESUME, num_wa_regs); > + else > + igt_skip_on("No Workaround table available!!\n"); > + } This kind of check needs updating for each platform. That generates a lot of "stupid" work. And indeed, it's already out of date (CHV). We should be able to use some information from the debugfs file directly to do the right thing. With your current format for the debugfs file, I don't think we need a platform test at all. platforms that don't have a list will just expose: "Workarounds applied: 0\n" and we can happily pass the test.
On Tue, Aug 26, 2014 at 02:50:28PM +0100, Arun Siluvery wrote: > + igt_fixture { [...] > + > + fd = igt_debugfs_open("intel_wa_registers", O_RDONLY); > + igt_assert(fd >= 0); This will make the test fail on kernels that don't have your kernel work exposing that debugfs file. It should skip instead.
diff --git a/tests/.gitignore b/tests/.gitignore index 985afbd..1103e2e 100644 --- a/tests/.gitignore +++ b/tests/.gitignore @@ -97,20 +97,21 @@ gem_tiled_fence_blits gem_tiled_partial_pwrite_pread gem_tiled_pread gem_tiled_pread_pwrite gem_tiled_swapping gem_tiling_max_stride gem_unfence_active_buffers gem_unref_active_buffers gem_userptr_blits gem_wait_render_timeout gem_write_read_ring_switch +gem_workarounds gen3_mixed_blits gen3_render_linear_blits gen3_render_mixed_blits gen3_render_tiledx_blits gen3_render_tiledy_blits gen7_forcewake_mt igt_fork_helper igt_list_only igt_no_exit igt_no_exit_list_only diff --git a/tests/Makefile.sources b/tests/Makefile.sources index 0eb9369..a17acd1 100644 --- a/tests/Makefile.sources +++ b/tests/Makefile.sources @@ -127,20 +127,21 @@ TESTS_progs = \ gem_storedw_loop_vebox \ gem_threaded_access_tiled \ gem_tiled_fence_blits \ gem_tiled_pread \ gem_tiled_pread_pwrite \ gem_tiled_swapping \ gem_tiling_max_stride \ gem_unfence_active_buffers \ gem_unref_active_buffers \ gem_wait_render_timeout \ + gem_workarounds \ gen3_mixed_blits \ gen3_render_linear_blits \ gen3_render_mixed_blits \ gen3_render_tiledx_blits \ gen3_render_tiledy_blits \ gen7_forcewake_mt \ kms_force_connector \ kms_sink_crc_basic \ kms_fence_pin_leak \ pm_psr \ diff --git a/tests/gem_workarounds.c b/tests/gem_workarounds.c new file mode 100644 index 0000000..91c2aeb --- /dev/null +++ b/tests/gem_workarounds.c @@ -0,0 +1,233 @@ +/* + * Copyright © 2014 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Arun Siluvery <arun.siluvery@linux.intel.com> + * + */ + +#define _GNU_SOURCE +#include <stdbool.h> +#include <unistd.h> +#include <stdlib.h> +#include <stdio.h> +#include <string.h> +#include <fcntl.h> +#include <inttypes.h> +#include <errno.h> +#include <sys/stat.h> +#include <sys/ioctl.h> +#include <sys/mman.h> +#include <time.h> +#include <signal.h> + +#include "ioctl_wrappers.h" +#include "drmtest.h" +#include "igt_debugfs.h" +#include "igt_aux.h" +#include "intel_chipset.h" +#include "intel_io.h" + +enum operation { + GPU_RESET = 0x01, + SUSPEND_RESUME = 0x02, +}; + +struct intel_wa_reg { + uint32_t addr; + uint32_t value; + uint32_t mask; +}; + +int drm_fd; +uint32_t devid; +static drm_intel_bufmgr *bufmgr; +struct intel_batchbuffer *batch; +int num_wa_regs; +struct intel_wa_reg *wa_regs; + + +static void test_hang_gpu(void) +{ + int retry_count = 30; + enum stop_ring_flags flags; + struct drm_i915_gem_execbuffer2 execbuf; + struct drm_i915_gem_exec_object2 gem_exec; + uint32_t b[2] = {MI_BATCH_BUFFER_END}; + + igt_assert(retry_count); + igt_set_stop_rings(STOP_RING_DEFAULTS); + + memset(&gem_exec, 0, sizeof(gem_exec)); + gem_exec.handle = gem_create(drm_fd, 4096); + gem_write(drm_fd, gem_exec.handle, 0, b, sizeof(b)); + + memset(&execbuf, 0, sizeof(execbuf)); + execbuf.buffers_ptr = (uintptr_t)&gem_exec; + execbuf.buffer_count = 1; + execbuf.batch_len = sizeof(b); + + drmIoctl(drm_fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf); + + while(retry_count--) { + flags = igt_get_stop_rings(); + if (flags == 0) + break; + igt_info("gpu hang not yet cleared, retries left %d\n", retry_count); + sleep(1); + } + + flags = igt_get_stop_rings(); + if (flags) + igt_set_stop_rings(STOP_RING_NONE); +} + +static void test_suspend_resume(void) +{ + igt_info("Suspending the device ...\n"); + igt_system_suspend_autoresume(); +} + +static void get_current_wa_data(struct intel_wa_reg **curr, int num) +{ + int i; + struct intel_wa_reg *ptr = NULL; + + ptr = *curr; + + intel_register_access_init(intel_get_pci_device(), 0); + + for (i = 0; i < num; ++i) { + ptr[i].addr = wa_regs[i].addr; + ptr[i].value = intel_register_read(wa_regs[i].addr); + ptr[i].mask = wa_regs[i].mask; + } + + intel_register_access_fini(); +} + +static void check_workarounds(enum operation op, int num) +{ + int i; + int fail_count = 0; + int status = 0; + struct intel_wa_reg *current_wa = NULL; + + switch (op) { + case GPU_RESET: + test_hang_gpu(); + break; + + case SUSPEND_RESUME: + test_suspend_resume(); + break; + + default: + fail_count = 1; + goto out; + } + + current_wa = malloc(num * sizeof(*current_wa)); + igt_assert(current_wa); + get_current_wa_data(¤t_wa, num); + + igt_info("Address\tbefore\t\tafter\t\tw/a mask\tresult\n"); + for (i = 0; i < num; ++i) { + status = (current_wa[i].value & current_wa[i].mask) != + (wa_regs[i].value & wa_regs[i].mask); + if (status) + ++fail_count; + + igt_info("0x%X\t0x%08X\t0x%08X\t0x%08X\t%s\n", + current_wa[i].addr, wa_regs[i].value, + current_wa[i].value, current_wa[i].mask, + status ? "fail" : "success"); + } + +out: + free(current_wa); + igt_assert(fail_count == 0); +} + +igt_main +{ + igt_fixture { + int i; + int fd; + int ret; + FILE *file; + char *line = NULL; + size_t line_size; + + drm_fd = drm_open_any(); + + bufmgr = drm_intel_bufmgr_gem_init(drm_fd, 4096); + devid = intel_get_drm_devid(drm_fd); + batch = intel_batchbuffer_alloc(bufmgr, devid); + + fd = igt_debugfs_open("intel_wa_registers", O_RDONLY); + igt_assert(fd >= 0); + + file = fdopen(fd, "r"); + igt_assert(file > 0); + + ret = getline(&line, &line_size, file); + igt_assert(ret > 0); + sscanf(line, "Workarounds applied: %d", &num_wa_regs); + igt_assert(num_wa_regs > 0); + + wa_regs = malloc(num_wa_regs * sizeof(*wa_regs)); + + i = 0; + while(getline(&line, &line_size, file) > 0) { + sscanf(line, "0x%X: 0x%08X, mask: 0x%08X", + &wa_regs[i].addr, &wa_regs[i].value, + &wa_regs[i].mask); + ++i; + } + + free(line); + fclose(file); + close(fd); + } + + igt_subtest("check-workaround-data-after-reset") { + if (IS_BROADWELL(devid)) + check_workarounds(GPU_RESET, num_wa_regs); + else + igt_skip_on("No Workaround table available!!\n"); + } + + igt_subtest("check-workaround-data-after-suspend-resume") { + if (IS_BROADWELL(devid)) + check_workarounds(SUSPEND_RESUME, num_wa_regs); + else + igt_skip_on("No Workaround table available!!\n"); + } + + igt_fixture { + free(wa_regs); + close(drm_fd); + } + + igt_exit(); +}
Some of the workarounds are lost followed by a gpu reset, suspend/resume; this patch adds a test which compares register state before and after the test scenario. This test currently verifies only bdw workarounds. v2: address patch cleanup comments (ThomasW) Add binary to ignore list and use igt_debugfs helper fns to read debugfs file and igt_info for printing debug info. v2.1: address minor comments from Daniel use igt_main as opposed to normal main Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com> --- tests/.gitignore | 1 + tests/Makefile.sources | 1 + tests/gem_workarounds.c | 233 ++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 235 insertions(+) create mode 100644 tests/gem_workarounds.c