| Message ID | 1409757194-28155-5-git-send-email-bhupesh.sharma@freescale.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Wednesday 03 September 2014 20:43:12 Bhupesh Sharma wrote: > diff --git a/arch/arm64/boot/dts/fsl-ls2085a-simu.dts b/arch/arm64/boot/dts/fsl-ls2085a-simu.dts > new file mode 100644 > index 0000000..3c0f953 > --- /dev/null > +++ b/arch/arm64/boot/dts/fsl-ls2085a-simu.dts > @@ -0,0 +1,26 @@ > +/* > + * Device Tree file for Freescale LS2085a software Simulator model > + * > + * Copyright (C) 2014, Freescale Semiconductor > + * > + * Bhupesh Sharma <bhupesh.sharma@freescale.com> > + * > + * This file is licensed under the terms of the GNU General Public > + * License version 2. This program is licensed "as is" without any > + * warranty of any kind, whether express or implied. > + */ > One more thing, same comment as for the respective Exynos7 patch: can this please be a permissive license, like GPLv2+MIT dual license? Arnd
Hi Arnd, > -----Original Message----- > From: Arnd Bergmann [mailto:arnd@arndb.de] > Sent: Thursday, September 04, 2014 12:05 AM > To: linux-arm-kernel@lists.infradead.org > Cc: Sharma Bhupesh-B45370; Catalin.Marinas@arm.com; mark.rutland@arm.com; > rob.herring@linaro.org; marc.zyngier@arm.com; Will.Deacon@arm.com; Yoder > Stuart-B08248; grant.likely@secretlab.ca; Basu Arnab-B45036 > Subject: Re: [PATCH V3 4/6] arm64: Add DTS support for FSL's LS2085A SoC > > On Wednesday 03 September 2014 20:43:12 Bhupesh Sharma wrote: > > diff --git a/arch/arm64/boot/dts/fsl-ls2085a-simu.dts > > b/arch/arm64/boot/dts/fsl-ls2085a-simu.dts > > new file mode 100644 > > index 0000000..3c0f953 > > --- /dev/null > > +++ b/arch/arm64/boot/dts/fsl-ls2085a-simu.dts > > @@ -0,0 +1,26 @@ > > +/* > > + * Device Tree file for Freescale LS2085a software Simulator model > > + * > > + * Copyright (C) 2014, Freescale Semiconductor > > + * > > + * Bhupesh Sharma <bhupesh.sharma@freescale.com> > > + * > > + * This file is licensed under the terms of the GNU General Public > > + * License version 2. This program is licensed "as is" without any > > + * warranty of any kind, whether express or implied. > > + */ > > > > One more thing, same comment as for the respective Exynos7 patch: > can this please be a permissive license, like GPLv2+MIT dual license? > Yes. I saw Russell's email in which he mentions that Linus is ok with using the MIT X11 licenses ([1]). However, I am not sure I understand the GPLv2+MIT dual license. Is it listed separately on [2], or is it a sum of the X11 + GPLv2 clauses mentioned in [2]. [1] http://www.spinics.net/lists/arm-kernel/msg358782.html [2] http://www.gnu.org/licenses/license-list.html Regards, Bhupesh
Ping? > -----Original Message----- > From: Sharma Bhupesh-B45370 > Sent: Thursday, September 04, 2014 1:25 PM > To: 'Arnd Bergmann'; linux-arm-kernel@lists.infradead.org > Cc: Catalin.Marinas@arm.com; mark.rutland@arm.com; > rob.herring@linaro.org; marc.zyngier@arm.com; Will.Deacon@arm.com; Yoder > Stuart-B08248; grant.likely@secretlab.ca; Basu Arnab-B45036 > Subject: RE: [PATCH V3 4/6] arm64: Add DTS support for FSL's LS2085A SoC > > Hi Arnd, > > > -----Original Message----- > > From: Arnd Bergmann [mailto:arnd@arndb.de] > > Sent: Thursday, September 04, 2014 12:05 AM > > To: linux-arm-kernel@lists.infradead.org > > Cc: Sharma Bhupesh-B45370; Catalin.Marinas@arm.com; > > mark.rutland@arm.com; rob.herring@linaro.org; marc.zyngier@arm.com; > > Will.Deacon@arm.com; Yoder Stuart-B08248; grant.likely@secretlab.ca; > > Basu Arnab-B45036 > > Subject: Re: [PATCH V3 4/6] arm64: Add DTS support for FSL's LS2085A > > SoC > > > > On Wednesday 03 September 2014 20:43:12 Bhupesh Sharma wrote: > > > diff --git a/arch/arm64/boot/dts/fsl-ls2085a-simu.dts > > > b/arch/arm64/boot/dts/fsl-ls2085a-simu.dts > > > new file mode 100644 > > > index 0000000..3c0f953 > > > --- /dev/null > > > +++ b/arch/arm64/boot/dts/fsl-ls2085a-simu.dts > > > @@ -0,0 +1,26 @@ > > > +/* > > > + * Device Tree file for Freescale LS2085a software Simulator model > > > + * > > > + * Copyright (C) 2014, Freescale Semiconductor > > > + * > > > + * Bhupesh Sharma <bhupesh.sharma@freescale.com> > > > + * > > > + * This file is licensed under the terms of the GNU General Public > > > + * License version 2. This program is licensed "as is" without any > > > + * warranty of any kind, whether express or implied. > > > + */ > > > > > > > One more thing, same comment as for the respective Exynos7 patch: > > can this please be a permissive license, like GPLv2+MIT dual license? > > > > Yes. I saw Russell's email in which he mentions that Linus is ok with > using the MIT > X11 licenses ([1]). However, I am not sure I understand the GPLv2+MIT > dual license. > Is it listed separately on [2], or is it a sum of the X11 + GPLv2 clauses > mentioned in [2]. > > [1] http://www.spinics.net/lists/arm-kernel/msg358782.html > [2] http://www.gnu.org/licenses/license-list.html > > Regards, > Bhupesh
diff --git a/arch/arm64/boot/dts/fsl-ls2085a-simu.dts b/arch/arm64/boot/dts/fsl-ls2085a-simu.dts new file mode 100644 index 0000000..3c0f953 --- /dev/null +++ b/arch/arm64/boot/dts/fsl-ls2085a-simu.dts @@ -0,0 +1,26 @@ +/* + * Device Tree file for Freescale LS2085a software Simulator model + * + * Copyright (C) 2014, Freescale Semiconductor + * + * Bhupesh Sharma <bhupesh.sharma@freescale.com> + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +/dts-v1/; + +/include/ "fsl-ls2085a.dtsi" + +/ { + model = "Freescale Layerscape 2085a software Simulator model"; + compatible = "fsl,ls2085a-simu", "fsl,ls2085a"; + + ethernet@2210000 { + compatible = "smsc,lan91c111"; + reg = <0x0 0x2210000 0x0 0x100>; + interrupts = <0 58 0x1>; + }; +}; diff --git a/arch/arm64/boot/dts/fsl-ls2085a.dtsi b/arch/arm64/boot/dts/fsl-ls2085a.dtsi new file mode 100644 index 0000000..0f9170d --- /dev/null +++ b/arch/arm64/boot/dts/fsl-ls2085a.dtsi @@ -0,0 +1,117 @@ +/* + * Device Tree Include file for Freescale Layerscape-2085A family SoC. + * + * Copyright (C) 2014, Freescale Semiconductor + * + * Bhupesh Sharma <bhupesh.sharma@freescale.com> + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +/ { + compatible = "fsl,ls2085a"; + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + /* We have 4 clusters having 2 Cortex-A57 cores each */ + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a57"; + reg = <0x0 0x0>; + }; + + cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a57"; + reg = <0x0 0x1>; + }; + + cpu@100 { + device_type = "cpu"; + compatible = "arm,cortex-a57"; + reg = <0x0 0x100>; + }; + + cpu@101 { + device_type = "cpu"; + compatible = "arm,cortex-a57"; + reg = <0x0 0x101>; + }; + + cpu@200 { + device_type = "cpu"; + compatible = "arm,cortex-a57"; + reg = <0x0 0x200>; + }; + + cpu@201 { + device_type = "cpu"; + compatible = "arm,cortex-a57"; + reg = <0x0 0x201>; + }; + + cpu@300 { + device_type = "cpu"; + compatible = "arm,cortex-a57"; + reg = <0x0 0x300>; + }; + + cpu@301 { + device_type = "cpu"; + compatible = "arm,cortex-a57"; + reg = <0x0 0x301>; + }; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x00000000 0x80000000 0 0x80000000>; + /* DRAM space - 1, size : 2 GB DRAM */ + }; + + gic: interrupt-controller@6000000 { + compatible = "arm,gic-v3"; + reg = <0x0 0x06000000 0 0x10000>, /* GIC Dist */ + <0x0 0x06100000 0 0x100000>; /* GICR (RD_base + SGI_base) */ + #interrupt-cells = <3>; + interrupt-controller; + interrupts = <1 9 0x4>; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <1 13 0x1>, /* Physical Secure PPI, edge triggered */ + <1 14 0x1>, /* Physical Non-Secure PPI, edge triggered */ + <1 11 0x1>, /* Virtual PPI, edge triggered */ + <1 10 0x1>; /* Hypervisor PPI, edge triggered */ + }; + + serial0: serial@21c0500 { + device_type = "serial"; + compatible = "fsl,ns16550", "ns16550a"; + reg = <0x0 0x21c0500 0x0 0x100>; + clock-frequency = <0>; /* Updated by bootloader */ + interrupts = <0 32 0x1>; /* edge triggered */ + }; + + serial1: serial@21c0600 { + device_type = "serial"; + compatible = "fsl,ns16550", "ns16550a"; + reg = <0x0 0x21c0600 0x0 0x100>; + clock-frequency = <0>; /* Updated by bootloader */ + interrupts = <0 32 0x1>; /* edge triggered */ + }; + + fsl_mc: fsl-mc@80c000000 { + compatible = "fsl,qoriq-mc"; + reg = <0x00000008 0x0c000000 0 0x40>, /* MC portal base */ + <0x00000000 0x08340000 0 0x40000>; /* MC control reg */ + }; +};