Message ID | 1407470159-14722-4-git-send-email-kever.yang@rock-chips.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Kever, On Thu, Aug 7, 2014 at 8:55 PM, Kever Yang <kever.yang@rock-chips.com> wrote: > rk3288 has two kind of usb controller, this add the dwc2 controller > for otg and host1. > > Controller can works with usb PHY default setting and Vbus on. > > Signed-off-by: Kever Yang <kever.yang@rock-chips.com> > Reviewed-by: Doug Anderson <dianders@chromium.org> > Tested-by: Doug Anderson <dianders@chromium.org> > --- > > Changes in v5: > - change the sort order of dwc2 in rk3288.dtsi > > Changes in v4: None > Changes in v3: > - EHCI and HSIC move new for version 3. > > Changes in v2: None > > arch/arm/boot/dts/rk3288.dtsi | 20 ++++++++++++++++++++ > 1 file changed, 20 insertions(+) IMHO this series is ready to go in for 3.18. I'm assuming Heiko will pick it up once the bindings have landed. It already has my tags. ;)
Am Freitag, 8. August 2014, 08:45:16 schrieb Doug Anderson: > Kever, > > On Thu, Aug 7, 2014 at 8:55 PM, Kever Yang <kever.yang@rock-chips.com> wrote: > > rk3288 has two kind of usb controller, this add the dwc2 controller > > for otg and host1. > > > > Controller can works with usb PHY default setting and Vbus on. > > > > Signed-off-by: Kever Yang <kever.yang@rock-chips.com> > > Reviewed-by: Doug Anderson <dianders@chromium.org> > > Tested-by: Doug Anderson <dianders@chromium.org> > > --- > > > > Changes in v5: > > - change the sort order of dwc2 in rk3288.dtsi > > > > Changes in v4: None > > Changes in v3: > > - EHCI and HSIC move new for version 3. > > > > Changes in v2: None > > > > arch/arm/boot/dts/rk3288.dtsi | 20 ++++++++++++++++++++ > > 1 file changed, 20 insertions(+) > > IMHO this series is ready to go in for 3.18. I'm assuming Heiko will > pick it up once the bindings have landed. It already has my tags. ;) correct ... the dts changes look ok, so I'll take patches 3 and 4 once patches 1 and 2 are included somewhere. Heiko
Am Freitag, 8. August 2014, 17:53:45 schrieb Heiko Stübner: > Am Freitag, 8. August 2014, 08:45:16 schrieb Doug Anderson: > > Kever, > > > > On Thu, Aug 7, 2014 at 8:55 PM, Kever Yang <kever.yang@rock-chips.com> > > wrote: > > > rk3288 has two kind of usb controller, this add the dwc2 controller > > > for otg and host1. > > > > > > Controller can works with usb PHY default setting and Vbus on. > > > > > > Signed-off-by: Kever Yang <kever.yang@rock-chips.com> > > > Reviewed-by: Doug Anderson <dianders@chromium.org> > > > Tested-by: Doug Anderson <dianders@chromium.org> > > > --- > > > > > > Changes in v5: > > > - change the sort order of dwc2 in rk3288.dtsi > > > > > > Changes in v4: None > > > Changes in v3: > > > - EHCI and HSIC move new for version 3. > > > > > > Changes in v2: None > > > > > > arch/arm/boot/dts/rk3288.dtsi | 20 ++++++++++++++++++++ > > > 1 file changed, 20 insertions(+) > > > > IMHO this series is ready to go in for 3.18. I'm assuming Heiko will > > pick it up once the bindings have landed. It already has my tags. ;) > > correct ... the dts changes look ok, so I'll take patches 3 and 4 once > patches 1 and 2 are included somewhere. > I've added patches 3 and 4 to my v3.18-next/dts branch
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 5950b0a..58167f1 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -206,6 +206,26 @@ /* NOTE: ohci@ff520000 doesn't actually work on hardware */ + usb_host1: usb@ff540000 { + compatible = "rockchip,rk3288-usb", "rockchip,rk3066-usb", + "snps,dwc2"; + reg = <0xff540000 0x40000>; + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru HCLK_USBHOST1>; + clock-names = "otg"; + status = "disabled"; + }; + + usb_otg: usb@ff580000 { + compatible = "rockchip,rk3288-usb", "rockchip,rk3066-usb", + "snps,dwc2"; + reg = <0xff580000 0x40000>; + interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru HCLK_OTG0>; + clock-names = "otg"; + status = "disabled"; + }; + usb_hsic: usb@ff5c0000 { compatible = "generic-ehci"; reg = <0xff5c0000 0x100>;