| Message ID | 1412605640-29472-1-git-send-email-alexander.stein@systec-electronic.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 06/10/2014 16:27, Alexander Stein : > Add the missing CAN devices node including their pin muxing and clocks. > > Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com> > Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> > --- > Changes in v3: > * Match the pin name to the ones in the datasheet. > > arch/arm/boot/dts/at91sam9x5.dtsi | 48 +++++++++++++++++++++++++++++++++++++++ Alexander, In fact, we already have a placeholder for these nodes: arch/arm/boot/dts/at91sam9x5_can.dtsi The file is only included in SoC device trees which actually contain this peripheral: at91sam9x25 and at91sam9x35 (and not the other variants of this family). So, can you please move this addition above into the arch/arm/boot/dts/at91sam9x5_can.dtsi file? > 1 file changed, 48 insertions(+) > > diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi > index e1a5c70..a58c1de 100644 > --- a/arch/arm/boot/dts/at91sam9x5.dtsi > +++ b/arch/arm/boot/dts/at91sam9x5.dtsi > @@ -363,6 +363,16 @@ > #clock-cells = <0>; > reg = <28>; > }; > + > + can0_clk: can0_clk { > + #clock-cells = <0>; > + reg = <29>; > + }; > + > + can1_clk: can1_clk { > + #clock-cells = <0>; > + reg = <30>; In fact, the clocks are already defined in the file that I pointed out above, so you will be able to remove them. > + }; > }; > }; > > @@ -407,6 +417,28 @@ > }; > }; > > + can0: can@f8000000 { > + compatible = "atmel,at91sam9x5-can"; > + reg = <0xf8000000 0x300>; > + interrupts = <29 IRQ_TYPE_LEVEL_HIGH 3>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_can0_rx_tx>; > + clocks = <&can0_clk>; > + clock-names = "can_clk"; > + status = "disabled"; > + }; > + > + can1: can@f8004000 { > + compatible = "atmel,at91sam9x5-can"; > + reg = <0xf8004000 0x300>; > + interrupts = <30 IRQ_TYPE_LEVEL_HIGH 3>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_can1_rx_tx>; > + clocks = <&can1_clk>; > + clock-names = "can_clk"; > + status = "disabled"; > + }; > + > tcb0: timer@f8008000 { > compatible = "atmel,at91sam9x5-tcb"; > reg = <0xf8008000 0x100>; > @@ -763,6 +795,22 @@ > }; > }; > > + can0 { > + pinctrl_can0_rx_tx: can0_rx_tx { > + atmel,pins = > + <AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* CANRX0, conflicts with DRXD */ > + AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* CANTX0, conflicts with DTXD */ > + }; > + }; > + > + can1 { > + pinctrl_can1_rx_tx: can1_rx_tx { > + atmel,pins = > + <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE /* CANRX1, conflicts with RXD1 */ > + AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* CANTX1, conflicts with TXD1 */ > + }; > + }; > + > pioA: gpio@fffff400 { > compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; > reg = <0xfffff400 0x200>; Otherwise, it looks good. Thanks for your help. Best regards,
Hi Jean, On Monday 06 October 2014 17:33:11, Nicolas Ferre wrote: > On 06/10/2014 16:27, Alexander Stein : > > Add the missing CAN devices node including their pin muxing and clocks. > > > > Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com> > > Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> > > --- > > Changes in v3: > > * Match the pin name to the ones in the datasheet. > > > > arch/arm/boot/dts/at91sam9x5.dtsi | 48 +++++++++++++++++++++++++++++++++++++++ > > Alexander, > > In fact, we already have a placeholder for these nodes: > arch/arm/boot/dts/at91sam9x5_can.dtsi > > The file is only included in SoC device trees which actually contain > this peripheral: at91sam9x25 and at91sam9x35 (and not the other variants > of this family). Actually, I can't find anyone including this :-/ If they would I guess I should have hit an error for duplicated labels. Is this a mistake no-one includes at91sam9x5_can.dtsi? > So, can you please move this addition above into the > arch/arm/boot/dts/at91sam9x5_can.dtsi file? Can you confirm that both (at91sam9x25 and at91sam9x35) have identical peripheral addresses, irq and pinmuxing? Best regards, Alexander
On 06/10/2014 17:57, Alexander Stein : > Hi Jean, s/Jean/Nicolas/ ;-) > On Monday 06 October 2014 17:33:11, Nicolas Ferre wrote: >> On 06/10/2014 16:27, Alexander Stein : >>> Add the missing CAN devices node including their pin muxing and clocks. >>> >>> Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com> >>> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> >>> --- >>> Changes in v3: >>> * Match the pin name to the ones in the datasheet. >>> >>> arch/arm/boot/dts/at91sam9x5.dtsi | 48 +++++++++++++++++++++++++++++++++++++++ >> >> Alexander, >> >> In fact, we already have a placeholder for these nodes: >> arch/arm/boot/dts/at91sam9x5_can.dtsi >> >> The file is only included in SoC device trees which actually contain >> this peripheral: at91sam9x25 and at91sam9x35 (and not the other variants >> of this family). > > Actually, I can't find anyone including this :-/ If they would I guess I should have hit an error for duplicated labels. > Is this a mistake no-one includes at91sam9x5_can.dtsi? Yes it is. It should be included in arch/arm/boot/dts/at91sam9x[23]5.dtsi files. >> So, can you please move this addition above into the >> arch/arm/boot/dts/at91sam9x5_can.dtsi file? > > Can you confirm that both (at91sam9x25 and at91sam9x35) have identical peripheral addresses, irq and pinmuxing? Absolutely, the same. Thanks, bye.
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi index e1a5c70..a58c1de 100644 --- a/arch/arm/boot/dts/at91sam9x5.dtsi +++ b/arch/arm/boot/dts/at91sam9x5.dtsi @@ -363,6 +363,16 @@ #clock-cells = <0>; reg = <28>; }; + + can0_clk: can0_clk { + #clock-cells = <0>; + reg = <29>; + }; + + can1_clk: can1_clk { + #clock-cells = <0>; + reg = <30>; + }; }; }; @@ -407,6 +417,28 @@ }; }; + can0: can@f8000000 { + compatible = "atmel,at91sam9x5-can"; + reg = <0xf8000000 0x300>; + interrupts = <29 IRQ_TYPE_LEVEL_HIGH 3>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can0_rx_tx>; + clocks = <&can0_clk>; + clock-names = "can_clk"; + status = "disabled"; + }; + + can1: can@f8004000 { + compatible = "atmel,at91sam9x5-can"; + reg = <0xf8004000 0x300>; + interrupts = <30 IRQ_TYPE_LEVEL_HIGH 3>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can1_rx_tx>; + clocks = <&can1_clk>; + clock-names = "can_clk"; + status = "disabled"; + }; + tcb0: timer@f8008000 { compatible = "atmel,at91sam9x5-tcb"; reg = <0xf8008000 0x100>; @@ -763,6 +795,22 @@ }; }; + can0 { + pinctrl_can0_rx_tx: can0_rx_tx { + atmel,pins = + <AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* CANRX0, conflicts with DRXD */ + AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* CANTX0, conflicts with DTXD */ + }; + }; + + can1 { + pinctrl_can1_rx_tx: can1_rx_tx { + atmel,pins = + <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE /* CANRX1, conflicts with RXD1 */ + AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* CANTX1, conflicts with TXD1 */ + }; + }; + pioA: gpio@fffff400 { compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfffff400 0x200>;