diff mbox

[v2,3/3] ARM: dts: qcom: Add SDHC nodes for APQ8084 platform

Message ID 1409672443-4289-4-git-send-email-gdjakov@mm-sol.com (mailing list archive)
State New, archived
Headers show

Commit Message

Georgi Djakov Sept. 2, 2014, 3:40 p.m. UTC
Enable support for the two SD host controllers on the APQ8084 platform
by adding the required nodes to the DT files.
On the IFC6540 board, the first controller is connected to the onboard
eMMC and the second is connected to a micro-SD card slot.

Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com>
---
 arch/arm/boot/dts/qcom-apq8084-ifc6540.dts |   11 +++++++++++
 arch/arm/boot/dts/qcom-apq8084.dtsi        |   23 +++++++++++++++++++++++
 2 files changed, 34 insertions(+)

Comments

Nicolas Dechesne Oct. 8, 2014, 7:18 p.m. UTC | #1
Georgi,

On Tue, Sep 2, 2014 at 5:40 PM, Georgi Djakov <gdjakov@mm-sol.com> wrote:
> Enable support for the two SD host controllers on the APQ8084 platform
> by adding the required nodes to the DT files.
> On the IFC6540 board, the first controller is connected to the onboard
> eMMC and the second is connected to a micro-SD card slot.

testing this set of patch on IFC6540, i noticed that not all
partitions from the eMMC are detected. booting [1] which is basically
3.17-rc7 with a few additional patches, i can see the following
relevant mmc traces:

[    1.162587] mmc0: BKOPS_EN bit is not set
[    1.315357] mmc0: new HS200 MMC card at address 0001
[    1.318098] mmcblk0: mmc0:0001 SEM16G 14.6 GiB
[    1.330377] mmcblk0boot0: mmc0:0001 SEM16G partition 1 4.00 MiB
[    1.333652] mmcblk0boot1: mmc0:0001 SEM16G partition 2 4.00 MiB
[    1.345424] mmcblk0rpmb: mmc0:0001 SEM16G partition 3 4.00 MiB
[    1.358135]  mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12 p13 p14 p15
[    1.365902]  mmcblk0boot1: p1
[    1.367833]  mmcblk0boot0: unknown partition table

on the same board, booting the board vendor kernel (which is based on
QCOM 3.10 tree), i can see much more partitions:

[    7.662379] mmc0: BKOPS_EN bit = 0
[    7.673036] mmc0: new HS200 MMC card at address 0001
[    7.673784] mmcblk0: mmc0:0001 SEM16G 14.6 GiB
[    7.674311] mmcblk0rpmb: mmc0:0001 SEM16G partition 3 4.00 MiB
[    7.677967]  mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12 p13
p14 p15 p16 p17 p18 p19 p20 p21 p22 p23 p24\
 p25

the complete dmesg log for can be found in our board lab, at [2]

cheers

[1] https://git.linaro.org/landing-teams/working/qualcomm/kernel.git/commit/b538bdefecd11bd0278cc31164e1078c1722e5a8
[2] http://armv7.com/scheduler/job/11726/log_file#L_11_11
Josh Cartwright Oct. 8, 2014, 7:45 p.m. UTC | #2
On Wed, Oct 08, 2014 at 09:18:44PM +0200, Nicolas Dechesne wrote:
> Georgi,
> 
> On Tue, Sep 2, 2014 at 5:40 PM, Georgi Djakov <gdjakov@mm-sol.com> wrote:
> > Enable support for the two SD host controllers on the APQ8084 platform
> > by adding the required nodes to the DT files.
> > On the IFC6540 board, the first controller is connected to the onboard
> > eMMC and the second is connected to a micro-SD card slot.
> 
> testing this set of patch on IFC6540, i noticed that not all
> partitions from the eMMC are detected. booting [1] which is basically
> 3.17-rc7 with a few additional patches, i can see the following
> relevant mmc traces:
> 
> [    1.162587] mmc0: BKOPS_EN bit is not set
> [    1.315357] mmc0: new HS200 MMC card at address 0001
> [    1.318098] mmcblk0: mmc0:0001 SEM16G 14.6 GiB
> [    1.330377] mmcblk0boot0: mmc0:0001 SEM16G partition 1 4.00 MiB
> [    1.333652] mmcblk0boot1: mmc0:0001 SEM16G partition 2 4.00 MiB
> [    1.345424] mmcblk0rpmb: mmc0:0001 SEM16G partition 3 4.00 MiB
> [    1.358135]  mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12 p13 p14 p15
> [    1.365902]  mmcblk0boot1: p1
> [    1.367833]  mmcblk0boot0: unknown partition table

This has bitten me more times than I care to admit, but have you checked
that you've set CONFIG_MMC_BLOCK_MINORS higher than 16?  Perhaps we
should be doing that in qcom_defconfig if we aren't already.
Nicolas Dechesne Oct. 9, 2014, 6:56 a.m. UTC | #3
On Wed, Oct 8, 2014 at 9:45 PM, Josh Cartwright <joshc@codeaurora.org> wrote:
> This has bitten me more times than I care to admit, but have you checked
> that you've set CONFIG_MMC_BLOCK_MINORS higher than 16?  Perhaps we
> should be doing that in qcom_defconfig if we aren't already.

ouch... i was using multi_v7_defconfig which indeed has:

CONFIG_MMC_BLOCK_MINORS=16

note that you can override the default CONFIG with bootargs with

mmcblk.perdev_minors=32

thanks!
Bjorn Andersson Oct. 10, 2014, 5:14 p.m. UTC | #4
On Tue, Sep 2, 2014 at 8:40 AM, Georgi Djakov <gdjakov@mm-sol.com> wrote:
> Enable support for the two SD host controllers on the APQ8084 platform
> by adding the required nodes to the DT files.
> On the IFC6540 board, the first controller is connected to the onboard
> eMMC and the second is connected to a micro-SD card slot.
>
> Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com>

Hi Georgi,

This looks sane, but...

> ---
>  arch/arm/boot/dts/qcom-apq8084-ifc6540.dts |   11 +++++++++++
>  arch/arm/boot/dts/qcom-apq8084.dtsi        |   23 +++++++++++++++++++++++
>  2 files changed, 34 insertions(+)
>
> diff --git a/arch/arm/boot/dts/qcom-apq8084-ifc6540.dts b/arch/arm/boot/dts/qcom-apq8084-ifc6540.dts
> index e41cb8a..c9ff108 100644
> --- a/arch/arm/boot/dts/qcom-apq8084-ifc6540.dts
> +++ b/arch/arm/boot/dts/qcom-apq8084-ifc6540.dts
[..]
> +               sdhci@f98a4900 {
> +                       cd-gpios = <&tlmm 122 GPIO_ACTIVE_LOW>;
> +                       bus-width = <4>;

...why do you add this node and leave it disabled in the dts?

> +               };
>         };
>  };

Regards,
Bjorn
Georgi Djakov Oct. 14, 2014, 4:17 p.m. UTC | #5
On 10/10/2014 08:14 PM, Bjorn Andersson wrote:
> On Tue, Sep 2, 2014 at 8:40 AM, Georgi Djakov <gdjakov@mm-sol.com> wrote:
>> Enable support for the two SD host controllers on the APQ8084 platform
>> by adding the required nodes to the DT files.
>> On the IFC6540 board, the first controller is connected to the onboard
>> eMMC and the second is connected to a micro-SD card slot.
>>
>> Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com>
> 
> Hi Georgi,
> 
> This looks sane, but...
> 
>> ---
>>  arch/arm/boot/dts/qcom-apq8084-ifc6540.dts |   11 +++++++++++
>>  arch/arm/boot/dts/qcom-apq8084.dtsi        |   23 +++++++++++++++++++++++
>>  2 files changed, 34 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/qcom-apq8084-ifc6540.dts b/arch/arm/boot/dts/qcom-apq8084-ifc6540.dts
>> index e41cb8a..c9ff108 100644
>> --- a/arch/arm/boot/dts/qcom-apq8084-ifc6540.dts
>> +++ b/arch/arm/boot/dts/qcom-apq8084-ifc6540.dts
> [..]
>> +               sdhci@f98a4900 {
>> +                       cd-gpios = <&tlmm 122 GPIO_ACTIVE_LOW>;
>> +                       bus-width = <4>;
> 
> ...why do you add this node and leave it disabled in the dts?
> 

Hi Bjorn,
Currently only the eMMC is functional on this board, so now we
have just the board specific configuration under this node.
More patches are forthcoming.

BR,
Georgi
Kumar Gala Oct. 15, 2014, 7:56 a.m. UTC | #6
On Oct 14, 2014, at 6:17 PM, Georgi Djakov <gdjakov@mm-sol.com> wrote:

> On 10/10/2014 08:14 PM, Bjorn Andersson wrote:
>> On Tue, Sep 2, 2014 at 8:40 AM, Georgi Djakov <gdjakov@mm-sol.com> wrote:
>>> Enable support for the two SD host controllers on the APQ8084 platform
>>> by adding the required nodes to the DT files.
>>> On the IFC6540 board, the first controller is connected to the onboard
>>> eMMC and the second is connected to a micro-SD card slot.
>>> 
>>> Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com>
>> 
>> Hi Georgi,
>> 
>> This looks sane, but...
>> 
>>> ---
>>> arch/arm/boot/dts/qcom-apq8084-ifc6540.dts |   11 +++++++++++
>>> arch/arm/boot/dts/qcom-apq8084.dtsi        |   23 +++++++++++++++++++++++
>>> 2 files changed, 34 insertions(+)
>>> 
>>> diff --git a/arch/arm/boot/dts/qcom-apq8084-ifc6540.dts b/arch/arm/boot/dts/qcom-apq8084-ifc6540.dts
>>> index e41cb8a..c9ff108 100644
>>> --- a/arch/arm/boot/dts/qcom-apq8084-ifc6540.dts
>>> +++ b/arch/arm/boot/dts/qcom-apq8084-ifc6540.dts
>> [..]
>>> +               sdhci@f98a4900 {
>>> +                       cd-gpios = <&tlmm 122 GPIO_ACTIVE_LOW>;
>>> +                       bus-width = <4>;
>> 
>> ...why do you add this node and leave it disabled in the dts?
>> 
> 
> Hi Bjorn,
> Currently only the eMMC is functional on this board, so now we
> have just the board specific configuration under this node.
> More patches are forthcoming.

Can we add something in the commit message to denote this.

- k
Andreas Färber Nov. 1, 2014, 3:43 p.m. UTC | #7
Hi Georgi,

Am 14.10.2014 um 18:17 schrieb Georgi Djakov:
> On 10/10/2014 08:14 PM, Bjorn Andersson wrote:
>> On Tue, Sep 2, 2014 at 8:40 AM, Georgi Djakov <gdjakov@mm-sol.com> wrote:
>>> Enable support for the two SD host controllers on the APQ8084 platform
>>> by adding the required nodes to the DT files.
>>> On the IFC6540 board, the first controller is connected to the onboard
>>> eMMC and the second is connected to a micro-SD card slot.
>>>
>>> Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com>
[...]
>>> ---
>>>  arch/arm/boot/dts/qcom-apq8084-ifc6540.dts |   11 +++++++++++
>>>  arch/arm/boot/dts/qcom-apq8084.dtsi        |   23 +++++++++++++++++++++++
>>>  2 files changed, 34 insertions(+)
>>>
>>> diff --git a/arch/arm/boot/dts/qcom-apq8084-ifc6540.dts b/arch/arm/boot/dts/qcom-apq8084-ifc6540.dts
>>> index e41cb8a..c9ff108 100644
>>> --- a/arch/arm/boot/dts/qcom-apq8084-ifc6540.dts
>>> +++ b/arch/arm/boot/dts/qcom-apq8084-ifc6540.dts
>> [..]
>>> +               sdhci@f98a4900 {
>>> +                       cd-gpios = <&tlmm 122 GPIO_ACTIVE_LOW>;
>>> +                       bus-width = <4>;
>>
>> ...why do you add this node and leave it disabled in the dts?
>>
> 
> Hi Bjorn,
> Currently only the eMMC is functional on this board, so now we
> have just the board specific configuration under this node.
> More patches are forthcoming.

Any update on this? This still seems to be the latest IFC6540 commit:

https://git.linaro.org/landing-teams/working/qualcomm/kernel.git/commit/66c04e30f4a6e6ed998a6c154a6c45b3cd5b3fde

Following the instructions in https://wiki.linaro.org/Boards/IFC6540
I've tried to pass a full rootfs as ramdisk parameter (fastboot boot -c
"console=ttyMSM0,115200,n8 rw rootwait" -b 0x0 zImage-ifc6540
initrd.cpio.gz), but I then get:

[258660] fastboot: download:12738800
[268150] fastboot: boot
[268150] kernel/ramdisk addresses overlap with aboot addresses.

Booting without ramdisk specified works, but for lack of SD, USB and
network support I then have no root.

So, do you have any new insights on why 'status = "okay";' doesn't work
for the above sdhci node? Or do you have a working config you can share
for creating a non-overlapping abootimg?

Regards,
Andreas
Srinivas Kandagatla Nov. 2, 2014, 8:08 a.m. UTC | #8
Hi Andreas,

On 01/11/14 15:43, Andreas Färber wrote:
> Hi Georgi,
>
> Am 14.10.2014 um 18:17 schrieb Georgi Djakov:
>> On 10/10/2014 08:14 PM, Bjorn Andersson wrote:
>>> On Tue, Sep 2, 2014 at 8:40 AM, Georgi Djakov <gdjakov@mm-sol.com> wrote:
>>>> Enable support for the two SD host controllers on the APQ8084 platform
>>>> by adding the required nodes to the DT files.
>>>> On the IFC6540 board, the first controller is connected to the onboard
>>>> eMMC and the second is connected to a micro-SD card slot.
>>>>
>>>> Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com>
> [...]
>>>> ---
>>>>   arch/arm/boot/dts/qcom-apq8084-ifc6540.dts |   11 +++++++++++
>>>>   arch/arm/boot/dts/qcom-apq8084.dtsi        |   23 +++++++++++++++++++++++
>>>>   2 files changed, 34 insertions(+)
>>>>
>>>> diff --git a/arch/arm/boot/dts/qcom-apq8084-ifc6540.dts b/arch/arm/boot/dts/qcom-apq8084-ifc6540.dts
>>>> index e41cb8a..c9ff108 100644
>>>> --- a/arch/arm/boot/dts/qcom-apq8084-ifc6540.dts
>>>> +++ b/arch/arm/boot/dts/qcom-apq8084-ifc6540.dts
>>> [..]
>>>> +               sdhci@f98a4900 {
>>>> +                       cd-gpios = <&tlmm 122 GPIO_ACTIVE_LOW>;
>>>> +                       bus-width = <4>;
>>>
>>> ...why do you add this node and leave it disabled in the dts?
>>>
>>
>> Hi Bjorn,
>> Currently only the eMMC is functional on this board, so now we
>> have just the board specific configuration under this node.
>> More patches are forthcoming.
>
> Any update on this? This still seems to be the latest IFC6540 commit:
>
> https://git.linaro.org/landing-teams/working/qualcomm/kernel.git/commit/66c04e30f4a6e6ed998a6c154a6c45b3cd5b3fde
>
> Following the instructions in https://wiki.linaro.org/Boards/IFC6540

I did update the wiki with more instructions to flash rootfs on to eMMC.

> I've tried to pass a full rootfs as ramdisk parameter (fastboot boot -c
> "console=ttyMSM0,115200,n8 rw rootwait" -b 0x0 zImage-ifc6540
> initrd.cpio.gz), but I then get:
There is a typo here, I fixed it as well.
#sudo fastboot boot -c "console=ttyMSM0,115200,n8 root=/dev/mmcblk0p25 
rootwait rw" -b 0x80200000 zImage-dtb

Could you give this a try?

>
> [258660] fastboot: download:12738800
> [268150] fastboot: boot
> [268150] kernel/ramdisk addresses overlap with aboot addresses.
>
> Booting without ramdisk specified works, but for lack of SD, USB and
> network support I then have no root.
>
Now you can flash the rootfs into the eMMC partition.
> So, do you have any new insights on why 'status = "okay";' doesn't work
> for the above sdhci node? Or do you have a working config you can share
> for creating a non-overlapping abootimg?

thanks,
sirni
>
> Regards,
> Andreas
>
diff mbox

Patch

diff --git a/arch/arm/boot/dts/qcom-apq8084-ifc6540.dts b/arch/arm/boot/dts/qcom-apq8084-ifc6540.dts
index e41cb8a..c9ff108 100644
--- a/arch/arm/boot/dts/qcom-apq8084-ifc6540.dts
+++ b/arch/arm/boot/dts/qcom-apq8084-ifc6540.dts
@@ -8,5 +8,16 @@ 
 		serial@f995e000 {
 			status = "okay";
 		};
+
+		sdhci@f9824900 {
+			bus-width = <8>;
+			non-removable;
+			status = "okay";
+		};
+
+		sdhci@f98a4900 {
+			cd-gpios = <&tlmm 122 GPIO_ACTIVE_LOW>;
+			bus-width = <4>;
+		};
 	};
 };
diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi
index 21d01e5..1f130bc 100644
--- a/arch/arm/boot/dts/qcom-apq8084.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8084.dtsi
@@ -3,6 +3,7 @@ 
 #include "skeleton.dtsi"
 
 #include <dt-bindings/clock/qcom,gcc-apq8084.h>
+#include <dt-bindings/gpio/gpio.h>
 
 / {
 	model = "Qualcomm APQ 8084";
@@ -203,5 +204,27 @@ 
 			clock-names = "core", "iface";
 			status = "disabled";
 		};
+
+		sdhci@f9824900 {
+			compatible = "qcom,sdhci-msm-v4";
+			reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
+			reg-names = "hc_mem", "core_mem";
+			interrupts = <0 123 0>, <0 138 0>;
+			interrupt-names = "hc_irq", "pwr_irq";
+			clocks = <&gcc GCC_SDCC1_APPS_CLK>, <&gcc GCC_SDCC1_AHB_CLK>;
+			clock-names = "core", "iface";
+			status = "disabled";
+		};
+
+		sdhci@f98a4900 {
+			compatible = "qcom,sdhci-msm-v4";
+			reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
+			reg-names = "hc_mem", "core_mem";
+			interrupts = <0 125 0>, <0 221 0>;
+			interrupt-names = "hc_irq", "pwr_irq";
+			clocks = <&gcc GCC_SDCC2_APPS_CLK>, <&gcc GCC_SDCC2_AHB_CLK>;
+			clock-names = "core", "iface";
+			status = "disabled";
+		};
 	};
 };