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[v3,2/4] spi: meson: Add device tree bindings documentation for SPIFC

Message ID 1416669702-7841-3-git-send-email-b.galvani@gmail.com (mailing list archive)
State New, archived
Headers show

Commit Message

Beniamino Galvani Nov. 22, 2014, 3:21 p.m. UTC 
This adds documentation of device tree bindings for the Amlogic Meson
SPIFC (SPI Flash Controller).

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
---
 .../devicetree/bindings/spi/spi-meson.txt          | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/spi/spi-meson.txt

Comments

Mark Brown Nov. 24, 2014, 6:54 p.m. UTC | #1 
On Sat, Nov 22, 2014 at 04:21:40PM +0100, Beniamino Galvani wrote:
> This adds documentation of device tree bindings for the Amlogic Meson
> SPIFC (SPI Flash Controller).

Applied, thanks.
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Patch

diff --git a/Documentation/devicetree/bindings/spi/spi-meson.txt b/Documentation/devicetree/bindings/spi/spi-meson.txt
new file mode 100644
index 0000000..bb52a86
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/spi-meson.txt
@@ -0,0 +1,22 @@ 
+Amlogic Meson SPI controllers
+
+* SPIFC (SPI Flash Controller)
+
+The Meson SPIFC is a controller optimized for communication with SPI
+NOR memories, without DMA support and a 64-byte unified transmit /
+receive buffer.
+
+Required properties:
+ - compatible: should be "amlogic,meson6-spifc"
+ - reg: physical base address and length of the controller registers
+ - clocks: phandle of the input clock for the baud rate generator
+ - #address-cells: should be 1
+ - #size-cells: should be 0
+
+	spi@c1108c80 {
+		compatible = "amlogic,meson6-spifc";
+		reg = <0xc1108c80 0x80>;
+		clocks = <&clk81>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};