diff mbox

ARM: dts: Add dts file for odroid XU3 board

Message ID 1417438770-28696-1-git-send-email-sjoerd.simons@collabora.co.uk (mailing list archive)
State New, archived
Headers show

Commit Message

Sjoerd Simons Dec. 1, 2014, 12:59 p.m. UTC
Add DTS for the Hardkernel Odroid XU3. The name of the DTS file is kept the
same as the vendors naming, which means it's prefixed with exynos5422
instead of exynos5800 as the SoC name even though it includes the
exyno5800 dtsi.

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
---
 arch/arm/boot/dts/Makefile                 |   1 +
 arch/arm/boot/dts/exynos5422-odroidxu3.dts | 325 +++++++++++++++++++++++++++++
 2 files changed, 326 insertions(+)
 create mode 100644 arch/arm/boot/dts/exynos5422-odroidxu3.dts

Comments

Heesub Shin Dec. 2, 2014, 6:17 a.m. UTC | #1
Hello Simons,

On 12/01/2014 09:59 PM, Sjoerd Simons wrote:
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> +*/
> +
> +/dts-v1/;
> +#include "exynos5800.dtsi"

Looking at exynos5800.dtsi, it derives from exynos5420.dtsi and seems 
having differences on clock and mfc. Is it proper to include 
exynos5800.dtsi here, instead of exynos5420.dtsi? It's just my curiosity 
as I am not in a position to know detailed things on the soc. Only 
semiconductor guys could answer this.

> +
> +/ {
> +	model = "Hardkernel Odroid XU3";
> +	compatible = "hardkernel,odroid-xu3", "samsung,exynos5800", "samsung,exynos5";
> +
> +	memory {
> +		reg = <0x20000000 0x80000000>;
> +	};

Start address above should be 0x40000000, not 0x20000000.

One more thing, having bootargs which specifies 'console=xxx' would be 
better.

regards,
heesub
Sjoerd Simons Dec. 2, 2014, 8:32 a.m. UTC | #2
On Tue, 2014-12-02 at 15:17 +0900, Heesub Shin wrote:
> Hello Simons,
> 
> On 12/01/2014 09:59 PM, Sjoerd Simons wrote:
> > + * This program is free software; you can redistribute it and/or modify
> > + * it under the terms of the GNU General Public License version 2 as
> > + * published by the Free Software Foundation.
> > +*/
> > +
> > +/dts-v1/;
> > +#include "exynos5800.dtsi"
> 
> Looking at exynos5800.dtsi, it derives from exynos5420.dtsi and seems 
> having differences on clock and mfc. Is it proper to include 
> exynos5800.dtsi here, instead of exynos5420.dtsi? It's just my curiosity 
> as I am not in a position to know detailed things on the soc. Only 
> semiconductor guys could answer this.

I would love to get a conclusive answer on this one as the exynos 5422
vs. exynos 5800 question seems to keep coming up (both on this list and
the u-boot one where XU3 support is being added as well). 

As far as i understand things the Exynos 5800 is a "variant" of the
Exynos 5422 for chromebooks[0]. I suspect things are just being called
5800 in the kernel and u-boot as the chromebooks were the first boards
based on this SoC to reach mainline...

Which led to interesting things like: 
  #define EXYNOS5800_SOC_ID  0xE5422000

Iotw, the identifier for the 5800 is 0x5422, which doesn't really make
things more clear.

I'm working on the assumption that this SoC variation doesn't expose
differences to the OS. I did not yet test the MFC, but should get round
to that later this week, which should help in verifying the MFC side of
things at least.. I haven't yet seen any issues caused due to the
differences in clock setup between samsung,exynos5800-clock and
samsung,exynos5420-clock

> > +
> > +/ {
> > +	model = "Hardkernel Odroid XU3";
> > +	compatible = "hardkernel,odroid-xu3", "samsung,exynos5800", "samsung,exynos5";
> > +
> > +	memory {
> > +		reg = <0x20000000 0x80000000>;
> > +	};
> 
> Start address above should be 0x40000000, not 0x20000000.

Indeed, the Hardkernel DTS also starts at 0x40000000, I missed that.
Looking at the other exynos5800/5420 based boards in the kernel they all
have their start offset at 0x20000000, is this different for the XU3
because it runs with secure firmware or is there some other reason
behind this?

> One more thing, having bootargs which specifies 'console=xxx' would be 
> better.

Hrm, i've got a dislike for chosen/bootargs as they typically seem
rather random/inconsistent (not sure who they're meant for). However, I
should indeed specify chosen/stdout-path to point to the serial console.

Thanks for your review!

0: See table at the bottom of
http://www.samsung.com/global/business/semiconductor/minisite/Exynos/w/solution.html#?v=octa_5422
Kevin Hilman Dec. 3, 2014, 7:53 p.m. UTC | #3
Sjoerd Simons <sjoerd.simons@collabora.co.uk> writes:

> Add DTS for the Hardkernel Odroid XU3. The name of the DTS file is kept the
> same as the vendors naming, which means it's prefixed with exynos5422
> instead of exynos5800 as the SoC name even though it includes the
> exyno5800 dtsi.
>
> Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>

Tested-by: Kevin Hilman <khilman@linaro.org>

Tried this on top of linux-next (next-20141125 and next20141203) and
boots fine on my odroid-xu3. 

Thanks for doing this, I've been meaning to get a DTS upstream for this
platform myself.  I also noticed that the imprecise aborts I've been
seeing when booting this board with the smdk5420 DTS are gone, so I
don't have to dig into those now either.  Thanks!  :)

Kevin
Tyler Baker Dec. 3, 2014, 8:24 p.m. UTC | #4
On 1 December 2014 at 04:59, Sjoerd Simons
<sjoerd.simons@collabora.co.uk> wrote:
> Add DTS for the Hardkernel Odroid XU3. The name of the DTS file is kept the
> same as the vendors naming, which means it's prefixed with exynos5422
> instead of exynos5800 as the SoC name even though it includes the
> exyno5800 dtsi.
>
> Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>

Tested-by: Tyler Baker <tyler.baker@linaro.org>

Tested this atop of next-20141203 both on exynos_defconfig and
multi_v7_defconfig. All configurations boot fine on my odroid-xu3
board, no imprecise aborts observed either.

Thanks!

Tyler
Sjoerd Simons Dec. 3, 2014, 8:36 p.m. UTC | #5
On Wed, 2014-12-03 at 11:53 -0800, Kevin Hilman wrote:
> Sjoerd Simons <sjoerd.simons@collabora.co.uk> writes:
> Tried this on top of linux-next (next-20141125 and next20141203) and
> boots fine on my odroid-xu3. 
> 
> Thanks for doing this, I've been meaning to get a DTS upstream for this
> platform myself.  I also noticed that the imprecise aborts I've been
> seeing when booting this board with the smdk5420 DTS are gone, so I
> don't have to dig into those now either.  Thanks!  :)

For completeness, the problem with running the smdk5420 DTS on the XU3
is that the XU3 runs secure firmware while the SMD5420 doesn't.. Hence
the imprecise aborts you were seeing.
Kevin Hilman Dec. 4, 2014, 4:40 a.m. UTC | #6
Sjoerd Simons <sjoerd.simons@collabora.co.uk> writes:

> On Wed, 2014-12-03 at 11:53 -0800, Kevin Hilman wrote:
>> Sjoerd Simons <sjoerd.simons@collabora.co.uk> writes:
>> Tried this on top of linux-next (next-20141125 and next20141203) and
>> boots fine on my odroid-xu3. 
>> 
>> Thanks for doing this, I've been meaning to get a DTS upstream for this
>> platform myself.  I also noticed that the imprecise aborts I've been
>> seeing when booting this board with the smdk5420 DTS are gone, so I
>> don't have to dig into those now either.  Thanks!  :)
>
> For completeness, the problem with running the smdk5420 DTS on the XU3
> is that the XU3 runs secure firmware while the SMD5420 doesn't.. Hence
> the imprecise aborts you were seeing.

OK, that's what I suspected but didn't take the time to verify.  Thanks
for the update.

BTW, I'll have some DTS updates for the xu3 to enable the on-board
INA2xx current sensors for easy power measurements without external
instrumentation.  Will send a patch for those soon.

Kevin
diff mbox

Patch

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 38c89ca..0a898cc 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -86,6 +86,7 @@  dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \
 	exynos5420-arndale-octa.dtb \
 	exynos5420-peach-pit.dtb \
 	exynos5420-smdk5420.dtb \
+	exynos5422-odroidxu3.dtb \
 	exynos5440-sd5v1.dtb \
 	exynos5440-ssdk5440.dtb \
 	exynos5800-peach-pi.dtb
diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3.dts b/arch/arm/boot/dts/exynos5422-odroidxu3.dts
new file mode 100644
index 0000000..fe37004
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5422-odroidxu3.dts
@@ -0,0 +1,325 @@ 
+/*
+ * Hardkernel Odroid XU3 board device tree source
+ *
+ * Copyright (c) 2014 Collabora Ltd.
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.
+ *		http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/dts-v1/;
+#include "exynos5800.dtsi"
+
+/ {
+	model = "Hardkernel Odroid XU3";
+	compatible = "hardkernel,odroid-xu3", "samsung,exynos5800", "samsung,exynos5";
+
+	memory {
+		reg = <0x20000000 0x80000000>;
+	};
+
+	fimd@14400000 {
+		status = "okay";
+	};
+
+	firmware@02073000 {
+		compatible = "samsung,secure-firmware";
+		reg = <0x02073000 0x1000>;
+	};
+
+	fixed-rate-clocks {
+		oscclk {
+			compatible = "samsung,exynos5420-oscclk";
+			clock-frequency = <24000000>;
+		};
+	};
+
+	hsi2c_4: i2c@12CA0000 {
+		status = "okay";
+
+		s2mps11_pmic@66 {
+			compatible = "samsung,s2mps11-pmic";
+			reg = <0x66>;
+			s2mps11,buck2-ramp-delay = <12>;
+			s2mps11,buck34-ramp-delay = <12>;
+			s2mps11,buck16-ramp-delay = <12>;
+			s2mps11,buck6-ramp-enable = <1>;
+			s2mps11,buck2-ramp-enable = <1>;
+			s2mps11,buck3-ramp-enable = <1>;
+			s2mps11,buck4-ramp-enable = <1>;
+
+			s2mps11_osc: clocks {
+				#clock-cells = <1>;
+				clock-output-names = "s2mps11_ap",
+						"s2mps11_cp", "s2mps11_bt";
+			};
+
+			regulators {
+				ldo1_reg: LDO1 {
+					regulator-name = "vdd_ldo1";
+					regulator-min-microvolt = <1000000>;
+					regulator-max-microvolt = <1000000>;
+					regulator-always-on;
+				};
+
+				ldo3_reg: LDO3 {
+					regulator-name = "vdd_ldo3";
+					regulator-min-microvolt = <1800000>;
+					regulator-max-microvolt = <1800000>;
+					regulator-always-on;
+				};
+
+				ldo5_reg: LDO5 {
+					regulator-name = "vdd_ldo5";
+					regulator-min-microvolt = <1800000>;
+					regulator-max-microvolt = <1800000>;
+					regulator-always-on;
+				};
+
+				ldo6_reg: LDO6 {
+					regulator-name = "vdd_ldo6";
+					regulator-min-microvolt = <1000000>;
+					regulator-max-microvolt = <1000000>;
+					regulator-always-on;
+				};
+
+				ldo7_reg: LDO7 {
+					regulator-name = "vdd_ldo7";
+					regulator-min-microvolt = <1800000>;
+					regulator-max-microvolt = <1800000>;
+					regulator-always-on;
+				};
+
+				ldo8_reg: LDO8 {
+					regulator-name = "vdd_ldo8";
+					regulator-min-microvolt = <1800000>;
+					regulator-max-microvolt = <1800000>;
+					regulator-always-on;
+				};
+
+				ldo9_reg: LDO9 {
+					regulator-name = "vdd_ldo9";
+					regulator-min-microvolt = <3000000>;
+					regulator-max-microvolt = <3000000>;
+					regulator-always-on;
+				};
+
+				ldo10_reg: LDO10 {
+					regulator-name = "vdd_ldo10";
+					regulator-min-microvolt = <1800000>;
+					regulator-max-microvolt = <1800000>;
+					regulator-always-on;
+				};
+
+				ldo11_reg: LDO11 {
+					regulator-name = "vdd_ldo11";
+					regulator-min-microvolt = <1000000>;
+					regulator-max-microvolt = <1000000>;
+					regulator-always-on;
+				};
+
+				ldo12_reg: LDO12 {
+					regulator-name = "vdd_ldo12";
+					regulator-min-microvolt = <1800000>;
+					regulator-max-microvolt = <1800000>;
+					regulator-always-on;
+				};
+
+				ldo13_reg: LDO13 {
+					regulator-name = "vdd_ldo13";
+					regulator-min-microvolt = <2800000>;
+					regulator-max-microvolt = <2800000>;
+					regulator-always-on;
+				};
+
+				ldo15_reg: LDO15 {
+					regulator-name = "vdd_ldo15";
+					regulator-min-microvolt = <3100000>;
+					regulator-max-microvolt = <3100000>;
+					regulator-always-on;
+				};
+
+				ldo16_reg: LDO16 {
+					regulator-name = "vdd_ldo16";
+					regulator-min-microvolt = <2200000>;
+					regulator-max-microvolt = <2200000>;
+					regulator-always-on;
+				};
+
+				ldo17_reg: LDO17 {
+					regulator-name = "tsp_avdd";
+					regulator-min-microvolt = <3300000>;
+					regulator-max-microvolt = <3300000>;
+					regulator-always-on;
+				};
+
+				ldo19_reg: LDO19 {
+					regulator-name = "vdd_sd";
+					regulator-min-microvolt = <2800000>;
+					regulator-max-microvolt = <2800000>;
+					regulator-always-on;
+				};
+
+				ldo24_reg: LDO24 {
+					regulator-name = "tsp_io";
+					regulator-min-microvolt = <2800000>;
+					regulator-max-microvolt = <2800000>;
+					regulator-always-on;
+				};
+
+				buck1_reg: BUCK1 {
+					regulator-name = "vdd_mif";
+					regulator-min-microvolt = <800000>;
+					regulator-max-microvolt = <1300000>;
+					regulator-always-on;
+					regulator-boot-on;
+				};
+
+				buck2_reg: BUCK2 {
+					regulator-name = "vdd_arm";
+					regulator-min-microvolt = <800000>;
+					regulator-max-microvolt = <1500000>;
+					regulator-always-on;
+					regulator-boot-on;
+				};
+
+				buck3_reg: BUCK3 {
+					regulator-name = "vdd_int";
+					regulator-min-microvolt = <800000>;
+					regulator-max-microvolt = <1400000>;
+					regulator-always-on;
+					regulator-boot-on;
+				};
+
+				buck4_reg: BUCK4 {
+					regulator-name = "vdd_g3d";
+					regulator-min-microvolt = <800000>;
+					regulator-max-microvolt = <1400000>;
+					regulator-always-on;
+					regulator-boot-on;
+				};
+
+				buck5_reg: BUCK5 {
+					regulator-name = "vdd_mem";
+					regulator-min-microvolt = <800000>;
+					regulator-max-microvolt = <1400000>;
+					regulator-always-on;
+					regulator-boot-on;
+				};
+
+				buck6_reg: BUCK6 {
+					regulator-name = "vdd_kfc";
+					regulator-min-microvolt = <800000>;
+					regulator-max-microvolt = <1500000>;
+					regulator-always-on;
+					regulator-boot-on;
+				};
+
+				buck7_reg: BUCK7 {
+					regulator-name = "vdd_1.0v_ldo";
+					regulator-min-microvolt = <800000>;
+					regulator-max-microvolt = <1500000>;
+					regulator-always-on;
+					regulator-boot-on;
+				};
+
+				buck8_reg: BUCK8 {
+					regulator-name = "vdd_1.8v_ldo";
+					regulator-min-microvolt = <800000>;
+					regulator-max-microvolt = <1500000>;
+					regulator-always-on;
+					regulator-boot-on;
+				};
+
+				buck9_reg: BUCK9 {
+					regulator-name = "vdd_2.8v_ldo";
+					regulator-min-microvolt = <3000000>;
+					regulator-max-microvolt = <3750000>;
+					regulator-always-on;
+					regulator-boot-on;
+				};
+
+				buck10_reg: BUCK10 {
+					regulator-name = "vdd_vmem";
+					regulator-min-microvolt = <2850000>;
+					regulator-max-microvolt = <2850000>;
+					regulator-always-on;
+					regulator-boot-on;
+				};
+			};
+		};
+	};
+
+	i2c_2: i2c@12C80000 {
+		samsung,i2c-sda-delay = <100>;
+		samsung,i2c-max-bus-freq = <66000>;
+		status = "okay";
+
+		hdmiddc@50 {
+			compatible = "samsung,exynos4210-hdmiddc";
+			reg = <0x50>;
+		};
+	};
+
+	rtc@101E0000 {
+		status = "okay";
+	};
+
+};
+
+&hdmi {
+	status = "okay";
+	hpd-gpio = <&gpx3 7 0>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&hdmi_hpd_irq>;
+
+	vdd_osc-supply = <&ldo10_reg>;
+	vdd_pll-supply = <&ldo8_reg>;
+	vdd-supply = <&ldo8_reg>;
+};
+
+
+&mmc_0 {
+	status = "okay";
+	broken-cd;
+	card-detect-delay = <200>;
+	samsung,dw-mshc-ciu-div = <3>;
+	samsung,dw-mshc-sdr-timing = <0 4>;
+	samsung,dw-mshc-ddr-timing = <0 2>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>;
+	bus-width = <8>;
+	cap-mmc-highspeed;
+};
+
+&mmc_2 {
+	status = "okay";
+	card-detect-delay = <200>;
+	samsung,dw-mshc-ciu-div = <3>;
+	samsung,dw-mshc-sdr-timing = <0 4>;
+	samsung,dw-mshc-ddr-timing = <0 2>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
+	bus-width = <4>;
+	cap-sd-highspeed;
+};
+
+&pinctrl_0 {
+	hdmi_hpd_irq: hdmi-hpd-irq {
+		samsung,pins = "gpx3-7";
+		samsung,pin-function = <0>;
+		samsung,pin-pud = <1>;
+		samsung,pin-drv = <0>;
+	};
+};
+
+&usbdrd_dwc3_0 {
+	dr_mode = "host";
+};
+
+&usbdrd_dwc3_1 {
+	dr_mode = "otg";
+};