| Message ID | 1417951306-11483-1-git-send-email-gaurav.k.singh@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Sun, 07 Dec 2014, Gaurav K Singh <gaurav.k.singh@intel.com> wrote: > DSI Pll1 is used for enabling DSI on Port C. > > Signed-off-by: Gaurav K Singh <gaurav.k.singh@intel.com> > --- > drivers/gpu/drm/i915/intel_dsi_pll.c | 7 +++++-- > 1 file changed, 5 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_dsi_pll.c b/drivers/gpu/drm/i915/intel_dsi_pll.c > index 8957f10..9b7f6a5 100644 > --- a/drivers/gpu/drm/i915/intel_dsi_pll.c > +++ b/drivers/gpu/drm/i915/intel_dsi_pll.c > @@ -241,9 +241,12 @@ static void vlv_configure_dsi_pll(struct intel_encoder *encoder) > return; > } > > - dsi_mnp.dsi_pll_ctrl |= DSI_PLL_CLK_GATE_DSI0_DSIPLL; > + if ((intel_dsi->ports == ((1 << PORT_A) | (1 << PORT_C))) || > + (intel_dsi->ports == (1 << PORT_A))) > + dsi_mnp.dsi_pll_ctrl |= DSI_PLL_CLK_GATE_DSI0_DSIPLL; > > - if (intel_dsi->dual_link) > + if ((intel_dsi->ports == ((1 << PORT_A) | (1 << PORT_C))) || > + (intel_dsi->ports == (1 << PORT_C))) > dsi_mnp.dsi_pll_ctrl |= DSI_PLL_CLK_GATE_DSI1_DSIPLL; In other words, patches 1 and 2 can be squashed into one that has: if (intel_dsi->ports & (1 << PORT_A)) dsi_mnp.dsi_pll_ctrl |= DSI_PLL_CLK_GATE_DSI0_DSIPLL; if (intel_dsi->ports & (1 << PORT_C)) dsi_mnp.dsi_pll_ctrl |= DSI_PLL_CLK_GATE_DSI1_DSIPLL; Right? BR, Jani. > > DRM_DEBUG_KMS("dsi pll div %08x, ctrl %08x\n", > -- > 1.7.9.5 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
-------------------------------------Summary-------------------------------------
Platform Delta drm-intel-nightly Series Applied
PNV 364/364 364/364
ILK -1 364/366 363/366
SNB -1 448/450 447/450
IVB 497/498 497/498
BYT 289/289 289/289
HSW 563/564 563/564
BDW 417/417 417/417
-------------------------------------Detailed-------------------------------------
Platform Test drm-intel-nightly Series Applied
*ILK igt_kms_flip_rcs-wf_vblank-vs-dpms-interruptible PASS(2, M26) DMESG_WARN(1, M26)
*ILK igt_kms_flip_wf_vblank-ts-check DMESG_WARN(1, M26)PASS(3, M26M37) NSPT(1, M26)
*SNB igt_kms_plane_plane-panning-bottom-right-pipe-A-plane-2 PASS(2, M35M22) DMESG_WARN(1, M22)
Note: You need to pay more attention to line start with '*'
On 12/8/2014 5:03 PM, Jani Nikula wrote: > On Sun, 07 Dec 2014, Gaurav K Singh <gaurav.k.singh@intel.com> wrote: >> DSI Pll1 is used for enabling DSI on Port C. >> >> Signed-off-by: Gaurav K Singh <gaurav.k.singh@intel.com> >> --- >> drivers/gpu/drm/i915/intel_dsi_pll.c | 7 +++++-- >> 1 file changed, 5 insertions(+), 2 deletions(-) >> >> diff --git a/drivers/gpu/drm/i915/intel_dsi_pll.c b/drivers/gpu/drm/i915/intel_dsi_pll.c >> index 8957f10..9b7f6a5 100644 >> --- a/drivers/gpu/drm/i915/intel_dsi_pll.c >> +++ b/drivers/gpu/drm/i915/intel_dsi_pll.c >> @@ -241,9 +241,12 @@ static void vlv_configure_dsi_pll(struct intel_encoder *encoder) >> return; >> } >> >> - dsi_mnp.dsi_pll_ctrl |= DSI_PLL_CLK_GATE_DSI0_DSIPLL; >> + if ((intel_dsi->ports == ((1 << PORT_A) | (1 << PORT_C))) || >> + (intel_dsi->ports == (1 << PORT_A))) >> + dsi_mnp.dsi_pll_ctrl |= DSI_PLL_CLK_GATE_DSI0_DSIPLL; >> >> - if (intel_dsi->dual_link) >> + if ((intel_dsi->ports == ((1 << PORT_A) | (1 << PORT_C))) || >> + (intel_dsi->ports == (1 << PORT_C))) >> dsi_mnp.dsi_pll_ctrl |= DSI_PLL_CLK_GATE_DSI1_DSIPLL; > In other words, patches 1 and 2 can be squashed into one that has: > > if (intel_dsi->ports & (1 << PORT_A)) > dsi_mnp.dsi_pll_ctrl |= DSI_PLL_CLK_GATE_DSI0_DSIPLL; > > if (intel_dsi->ports & (1 << PORT_C)) > dsi_mnp.dsi_pll_ctrl |= DSI_PLL_CLK_GATE_DSI1_DSIPLL; > > Right? > > BR, > Jani. Jani, Yes, uploaded the new patch addressing your comments. With regards, Gaurav > >> >> DRM_DEBUG_KMS("dsi pll div %08x, ctrl %08x\n", >> -- >> 1.7.9.5 >> >> _______________________________________________ >> Intel-gfx mailing list >> Intel-gfx@lists.freedesktop.org >> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/intel_dsi_pll.c b/drivers/gpu/drm/i915/intel_dsi_pll.c index 8957f10..9b7f6a5 100644 --- a/drivers/gpu/drm/i915/intel_dsi_pll.c +++ b/drivers/gpu/drm/i915/intel_dsi_pll.c @@ -241,9 +241,12 @@ static void vlv_configure_dsi_pll(struct intel_encoder *encoder) return; } - dsi_mnp.dsi_pll_ctrl |= DSI_PLL_CLK_GATE_DSI0_DSIPLL; + if ((intel_dsi->ports == ((1 << PORT_A) | (1 << PORT_C))) || + (intel_dsi->ports == (1 << PORT_A))) + dsi_mnp.dsi_pll_ctrl |= DSI_PLL_CLK_GATE_DSI0_DSIPLL; - if (intel_dsi->dual_link) + if ((intel_dsi->ports == ((1 << PORT_A) | (1 << PORT_C))) || + (intel_dsi->ports == (1 << PORT_C))) dsi_mnp.dsi_pll_ctrl |= DSI_PLL_CLK_GATE_DSI1_DSIPLL; DRM_DEBUG_KMS("dsi pll div %08x, ctrl %08x\n",
DSI Pll1 is used for enabling DSI on Port C. Signed-off-by: Gaurav K Singh <gaurav.k.singh@intel.com> --- drivers/gpu/drm/i915/intel_dsi_pll.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-)