| Message ID | 1421671269-19441-3-git-send-email-rsahu@apm.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
On Monday 19 January 2015 18:11:08 Rameshwar Prasad Sahu wrote: > diff --git a/arch/arm64/boot/dts/apm/apm-storm.dtsi b/arch/arm64/boot/dts/apm/apm-storm.dtsi > index f1ad9c2..e20da23 100644 > --- a/arch/arm64/boot/dts/apm/apm-storm.dtsi > +++ b/arch/arm64/boot/dts/apm/apm-storm.dtsi > @@ -103,6 +103,9 @@ > #size-cells = <2>; > ranges; > > + /* DDR range is 42-bit addressing */ > + dma-ranges = <0x40 0x0 0x40 0x0 0x1ff 0xffffffff>; > + > The comment above is misleading, and the value is wrong. I assume you copied these from the AMD patch that introduced the respective property. The value should be dma-ranges = <0x40 0x0 0x40 0x0 0x200 0>; to say that any DMA to physical addresses from 0 to 0x3f.ffffffff is disallowed and dma to physical addresses from 0x40.00000000 to 0x23f.ffffffff is allowed and gets translated using an identity mapping. I also see that on Mustang, all memory is outside of this range, which is a bit suspicious, while your PCI memory space is included. It would be best to match the numbers up with your data sheet. Arnd -- To unsubscribe from this list: send the line "unsubscribe dmaengine" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Thanks, with regards, Ram On Mon, Jan 19, 2015 at 8:11 PM, Rameshwar Sahu <rsahu@apm.com> wrote: > Hi Arnd, > > > > > > > Thanks, > with regards, > Ram > > On Mon, Jan 19, 2015 at 7:10 PM, Arnd Bergmann <arnd@arndb.de> wrote: >> >> On Monday 19 January 2015 18:11:08 Rameshwar Prasad Sahu wrote: >> > diff --git a/arch/arm64/boot/dts/apm/apm-storm.dtsi >> > b/arch/arm64/boot/dts/apm/apm-storm.dtsi >> > index f1ad9c2..e20da23 100644 >> > --- a/arch/arm64/boot/dts/apm/apm-storm.dtsi >> > +++ b/arch/arm64/boot/dts/apm/apm-storm.dtsi >> > @@ -103,6 +103,9 @@ >> > #size-cells = <2>; >> > ranges; >> > >> > + /* DDR range is 42-bit addressing */ >> > + dma-ranges = <0x40 0x0 0x40 0x0 0x1ff 0xffffffff>; >> > + >> > >> >> The comment above is misleading, and the value is wrong. I assume you >> >> copied these from the AMD patch that introduced the respective property. > > > I referred this patch from AMD only. >> >> >> The value should be >> >> dma-ranges = <0x40 0x0 0x40 0x0 0x200 0>; > > > then it should be : > > dma-ranges = <0x40 0x0 0x40 0x0 0x400 0>; > > >> to say that any DMA to physical addresses from 0 to 0x3f.ffffffff >> is disallowed and dma to physical addresses from 0x40.00000000 >> to 0x23f.ffffffff is allowed and gets translated using an >> identity mapping. >> >> I also see that on Mustang, all memory is outside of this range, > > > Do you mean all other device controller node in DT here?? > Basically these are all device controller memory, as what I understood is > dma-ranges tells about DDR ranges like start address of DDR > and length. > > >> >> which is a bit suspicious, while your PCI memory space is >> included. > > >> >> It would be best to match the numbers up with your data sheet. >> >> Arnd >> -- >> To unsubscribe from this list: send the line "unsubscribe dmaengine" in >> the body of a message to majordomo@vger.kernel.org >> More majordomo info at http://vger.kernel.org/majordomo-info.html > > -- To unsubscribe from this list: send the line "unsubscribe dmaengine" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Monday 19 January 2015 20:11:22 Rameshwar Sahu wrote: > > > > > The value should be > > > > dma-ranges = <0x40 0x0 0x40 0x0 0x200 0>; > > > > then it should be : > > dma-ranges = <0x40 0x0 0x40 0x0 0x400 0>; > > > to say that any DMA to physical addresses from 0 to 0x3f.ffffffff No, the property above is for a bus that extends from 0x40.00000000 to 0x43f.ffffffff The first tuple is the address that is used for the local bus, the second one is the address that it gets translated to on the parent bus, and the third tuple is the length. > > is disallowed and dma to physical addresses from 0x40.00000000 > > to 0x23f.ffffffff is allowed and gets translated using an > > identity mapping. > > > > I also see that on Mustang, all memory is outside of this range, > > > > Do you mean all other device controller node in DT here?? > Basically these are all device controller memory, as what I understood is > dma-ranges tells about DDR ranges like start address of DDR > and length. It has absolutely nothing to do with where the DDR memory resides, only which addresses are valid on a particular bus, like the ranges property for the opposite direction. This is usually set up in some control register for the bus, and you should use the same value here. Arnd -- To unsubscribe from this list: send the line "unsubscribe dmaengine" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/arch/arm64/boot/dts/apm/apm-storm.dtsi b/arch/arm64/boot/dts/apm/apm-storm.dtsi index f1ad9c2..e20da23 100644 --- a/arch/arm64/boot/dts/apm/apm-storm.dtsi +++ b/arch/arm64/boot/dts/apm/apm-storm.dtsi @@ -103,6 +103,9 @@ #size-cells = <2>; ranges; + /* DDR range is 42-bit addressing */ + dma-ranges = <0x40 0x0 0x40 0x0 0x1ff 0xffffffff>; + clocks { #address-cells = <2>; #size-cells = <2>; @@ -352,6 +355,15 @@ reg-names = "csr-reg"; clock-output-names = "pcie4clk"; }; + + dmaclk: dmaclk@1f27c000 { + compatible = "apm,xgene-device-clock"; + #clock-cells = <1>; + clocks = <&socplldiv2 0>; + reg = <0x0 0x1f27c000 0x0 0x1000>; + reg-names = "csr-reg"; + clock-output-names = "dmaclk"; + }; }; pcie0: pcie@1f2b0000 { @@ -656,5 +668,21 @@ interrupts = <0x0 0x41 0x4>; clocks = <&rngpkaclk 0>; }; + + dma: dma@1f270000 { + compatible = "apm,xgene-dma"; + device_type = "dma"; + reg = <0x0 0x1f270000 0x0 0x10000>, + <0x0 0x1f200000 0x0 0x10000>, + <0x0 0x1b008000 0x0 0x2000>; + reg-names = "dma_csr", "ring_csr", "ring_cmd"; + interrupts = <0x0 0x82 0x4>, + <0x0 0xb8 0x4>, + <0x0 0xb9 0x4>, + <0x0 0xba 0x4>, + <0x0 0xbb 0x4>; + dma-coherent; + clocks = <&dmaclk 0>; + }; }; };