diff mbox

[05/10] drm/i915: gen 9 h/w w/a (syncing dependencies between camera and graphics)

Message ID 1423133245-23953-6-git-send-email-nicholas.hoath@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Nick Hoath Feb. 5, 2015, 10:47 a.m. UTC
Added:
Syncing dependencies between camera and graphics

v1: Added missing register bitmap
Signed-off-by: Nick Hoath <nicholas.hoath@intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h         | 1 +
 drivers/gpu/drm/i915/intel_ringbuffer.c | 4 ++++
 2 files changed, 5 insertions(+)

Comments

Lespiau, Damien Feb. 5, 2015, 6 p.m. UTC | #1
On Thu, Feb 05, 2015 at 10:47:20AM +0000, Nick Hoath wrote:
> Added:
> Syncing dependencies between camera and graphics
> 
> v1: Added missing register bitmap
> Signed-off-by: Nick Hoath <nicholas.hoath@intel.com>

For the record, this W/A has no name nor documentation. So well...

Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index cd3430f9..dab4c1e 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -6213,6 +6213,7 @@  enum skl_disp_power_wells {
 #define HALF_SLICE_CHICKEN3		0xe184
 #define   HSW_SAMPLE_C_PERFORMANCE	(1<<9)
 #define   GEN8_CENTROID_PIXEL_OPT_DIS	(1<<8)
+#define   GEN9_DISABLE_OCL_OOB_SUPPRESS_LOGIC	(1<<5)
 #define   GEN8_SAMPLER_POWER_BYPASS_DIS	(1<<1)
 
 /* Audio */
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index fa15cb6..baeec8f 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -882,6 +882,10 @@  static int gen9_init_workarounds(struct intel_engine_cs *ring)
 	WA_SET_BIT_MASKED(GEN8_ROW_CHICKEN,
 			  PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE);
 
+	/* Syncing dependencies between camera and graphics */
+	WA_SET_BIT_MASKED(HALF_SLICE_CHICKEN3,
+			  GEN9_DISABLE_OCL_OOB_SUPPRESS_LOGIC);
+
 	if (INTEL_REVID(dev) == SKL_A0_REVID) {
 		/*
 		* WaDisableDgMirrorFixInHalfSliceChicken5:skl