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drm/i915: Clamp efficient frequency to valid range

Message ID 1423638406-87273-1-git-send-email-Tom.O'Rourke@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Tom.O'Rourke@intel.com Feb. 11, 2015, 7:06 a.m. UTC 
From: Tom O'Rourke <Tom.O'Rourke@intel.com>

The efficient frequency (RPe) should stay in the range
RPn <= RPe <= RP0.  The pcode clamps the returned value
internally on Broadwell but not on Haswell.

Fix for missing range check in
commit 93ee29203f506582cca2bcec5f05041526d9ab0a
Author: Tom O'Rourke <Tom.O'Rourke@intel.com>
Date:   Wed Nov 19 14:21:52 2014 -0800

    drm/i915: Use efficient frequency for HSW/BDW

Reference: http://lists.freedesktop.org/archives/intel-gfx/2015-February/059802.html
Reported-by: Michael Auchter <a@phire.org>
Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Tom O'Rourke <Tom.O'Rourke@intel.com>
---
 drivers/gpu/drm/i915/intel_pm.c |    5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

Comments

Jani Nikula Feb. 11, 2015, 8:27 a.m. UTC | #1 
On Wed, 11 Feb 2015, Tom.O'Rourke@intel.com wrote:
> From: Tom O'Rourke <Tom.O'Rourke@intel.com>
>
> The efficient frequency (RPe) should stay in the range
> RPn <= RPe <= RP0.  The pcode clamps the returned value
> internally on Broadwell but not on Haswell.
>
> Fix for missing range check in
> commit 93ee29203f506582cca2bcec5f05041526d9ab0a
> Author: Tom O'Rourke <Tom.O'Rourke@intel.com>
> Date:   Wed Nov 19 14:21:52 2014 -0800
>
>     drm/i915: Use efficient frequency for HSW/BDW
>
> Reference: http://lists.freedesktop.org/archives/intel-gfx/2015-February/059802.html
> Reported-by: Michael Auchter <a@phire.org>
> Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
> Signed-off-by: Tom O'Rourke <Tom.O'Rourke@intel.com>

Pushed to drm-intel-next-fixes with cc: stable for v3.19. Thanks for the
patch.

BR,
Jani.


> ---
>  drivers/gpu/drm/i915/intel_pm.c |    5 ++++-
>  1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index a3b979d..602c443 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3998,7 +3998,10 @@ static void gen6_init_rps_frequencies(struct drm_device *dev)
>  					&ddcc_status);
>  		if (0 == ret)
>  			dev_priv->rps.efficient_freq =
> -				(ddcc_status >> 8) & 0xff;
> +				clamp_t(u8,
> +					((ddcc_status >> 8) & 0xff),
> +					dev_priv->rps.min_freq,
> +					dev_priv->rps.max_freq);
>  	}
>  
>  	/* Preserve min/max settings in case of re-init */
> -- 
> 1.7.9.5
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index a3b979d..602c443 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3998,7 +3998,10 @@  static void gen6_init_rps_frequencies(struct drm_device *dev)
 					&ddcc_status);
 		if (0 == ret)
 			dev_priv->rps.efficient_freq =
-				(ddcc_status >> 8) & 0xff;
+				clamp_t(u8,
+					((ddcc_status >> 8) & 0xff),
+					dev_priv->rps.min_freq,
+					dev_priv->rps.max_freq);
 	}
 
 	/* Preserve min/max settings in case of re-init */