| Message ID | 1424268078-14541-1-git-send-email-akash.goel@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
From: Akash Goel <akash.goel@intel.com>
This patch series add missing changes, required for proper functioning of the
Turbo feature on SKL.
Addressed review comments from Damien & Chris.
Akash Goel (7):
drm/i915/skl: Added new macros
drm/i915/skl: Updated the gen6_set_rps function
drm/i915/skl: Restructured the gen6_set_rps_thresholds function
drm/i915/skl: Updated the gen6_rps_limits function
drm/i915/skl: Updated the gen9_enable_rps function
drm/i915/skl: Updated the 'i915_frequency_info' debugs function
drm/i915/skl: Enabling processing of Turbo interrupts
drivers/gpu/drm/i915/i915_debugfs.c | 25 ++++---
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/i915_irq.c | 5 --
drivers/gpu/drm/i915/i915_reg.h | 9 +++
drivers/gpu/drm/i915/intel_pm.c | 130 ++++++++++++++++++++++--------------
5 files changed, 106 insertions(+), 64 deletions(-)
On Wed, Feb 18, 2015 at 07:31:11PM +0530, akash.goel@intel.com wrote: > From: Akash Goel <akash.goel@intel.com> > > On SKL, the frequency programmed in RPNSWREQ (A008) register > has to be in units of 16.66 MHZ. So updated the gen6_set_rps > function, as per this change. > > Signed-off-by: Akash Goel <akash.goel@intel.com> > Reviewed-by: Lespiau, Damien <damien.lespiau@intel.com> I guess you've manually frobbed with the patch series that git format-patch has created. Whatever it is, the thing is out-of-order now and a bit a mess. Can you please resend without doing that? Thanks, Daniel > --- > drivers/gpu/drm/i915/intel_pm.c | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index bebefe7..1df3fbd 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -3764,7 +3764,10 @@ static void gen6_set_rps(struct drm_device *dev, u8 val) > if (val != dev_priv->rps.cur_freq) { > gen6_set_rps_thresholds(dev_priv, val); > > - if (IS_HASWELL(dev) || IS_BROADWELL(dev)) > + if (IS_GEN9(dev)) > + I915_WRITE(GEN6_RPNSWREQ, > + GEN9_FREQUENCY(val * GEN9_FREQ_SCALER)); > + else if (IS_HASWELL(dev) || IS_BROADWELL(dev)) > I915_WRITE(GEN6_RPNSWREQ, > HSW_FREQUENCY(val)); > else > -- > 1.9.2 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
On Wed, Feb 18, 2015 at 07:31:13PM +0530, akash.goel@intel.com wrote: > From: Akash Goel <akash.goel@intel.com> > > This patch series add missing changes, required for proper functioning of the > Turbo feature on SKL. > Addressed review comments from Damien & Chris. Another item on the TODO list (for whoever is going to fix this), it seems it'd be advisable to change gen9_enable_rc6() to use the new GT_INTERVAL_FROM_US() macro.
On Wed, Feb 18, 2015 at 07:31:11PM +0530, akash.goel@intel.com wrote: > From: Akash Goel <akash.goel@intel.com> > > On SKL, the frequency programmed in RPNSWREQ (A008) register > has to be in units of 16.66 MHZ. So updated the gen6_set_rps > function, as per this change. > > Signed-off-by: Akash Goel <akash.goel@intel.com> > Reviewed-by: Lespiau, Damien <damien.lespiau@intel.com> Please don't use the Outlook way "lastname, firstname" here :)
On Tue, Feb 24, 2015 at 03:22:54PM +0000, Damien Lespiau wrote: > On Wed, Feb 18, 2015 at 07:31:11PM +0530, akash.goel@intel.com wrote: > > From: Akash Goel <akash.goel@intel.com> > > > > On SKL, the frequency programmed in RPNSWREQ (A008) register > > has to be in units of 16.66 MHZ. So updated the gen6_set_rps > > function, as per this change. > > > > Signed-off-by: Akash Goel <akash.goel@intel.com> > > Reviewed-by: Lespiau, Damien <damien.lespiau@intel.com> > > Please don't use the Outlook way "lastname, firstname" here :) Another one: r-b tags should be treated like signatures and only perfectly copypasted. Writing your own is considered forgery ;-) Just another reason to use exactly the string provided. So same strict rules as with sob really. Cheers, Daniel
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index bebefe7..1df3fbd 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -3764,7 +3764,10 @@ static void gen6_set_rps(struct drm_device *dev, u8 val) if (val != dev_priv->rps.cur_freq) { gen6_set_rps_thresholds(dev_priv, val); - if (IS_HASWELL(dev) || IS_BROADWELL(dev)) + if (IS_GEN9(dev)) + I915_WRITE(GEN6_RPNSWREQ, + GEN9_FREQUENCY(val * GEN9_FREQ_SCALER)); + else if (IS_HASWELL(dev) || IS_BROADWELL(dev)) I915_WRITE(GEN6_RPNSWREQ, HSW_FREQUENCY(val)); else