diff mbox

[1/2] ARM: shmobile: r8a7794: add GPIO clocks

Message ID 1831753.Dnjo3xKPJv@wasted.cogentembedded.com (mailing list archive)
State Superseded
Headers show

Commit Message

Sergei Shtylyov Feb. 21, 2015, 10:11 p.m. UTC
Describe the GPIO clocks in the R8A7794 device tree.

Based on the original patch by Koji Matsuoka <koji.matsuoka.xm@renesas.com>.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>

---
 arch/arm/boot/dts/r8a7794.dtsi |   22 ++++++++++++++--------
 1 file changed, 14 insertions(+), 8 deletions(-)


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Comments

Geert Uytterhoeven Feb. 23, 2015, 11:08 a.m. UTC | #1
On Sat, Feb 21, 2015 at 11:11 PM, Sergei Shtylyov
<sergei.shtylyov@cogentembedded.com> wrote:
> Describe the GPIO clocks in the R8A7794 device tree.
>
> Based on the original patch by Koji Matsuoka <koji.matsuoka.xm@renesas.com>.
>
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>

Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
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Laurent Pinchart Feb. 25, 2015, 9:57 a.m. UTC | #2
Hi Sergei,

Thank you for the patch.

On Sunday 22 February 2015 01:11:25 Sergei Shtylyov wrote:
> Describe the GPIO clocks in the R8A7794 device tree.
> 
> Based on the original patch by Koji Matsuoka <koji.matsuoka.xm@renesas.com>.
> 
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>

Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>

> 
> ---
>  arch/arm/boot/dts/r8a7794.dtsi |   22 ++++++++++++++--------
>  1 file changed, 14 insertions(+), 8 deletions(-)
> 
> Index: renesas/arch/arm/boot/dts/r8a7794.dtsi
> ===================================================================
> --- renesas.orig/arch/arm/boot/dts/r8a7794.dtsi
> +++ renesas/arch/arm/boot/dts/r8a7794.dtsi
> @@ -651,16 +651,22 @@
>  		mstp9_clks: mstp9_clks@e6150994 {
>  			compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-
clocks";
>  			reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
> -			clocks = <&cpg_clocks R8A7794_CLK_QSPI>, <&hp_clk>, <&hp_clk>,
> -				<&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>;
> +			clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>,
> +				 <&cp_clk>, <&cp_clk>, <&cp_clk>,
> +				 <&cpg_clocks R8A7794_CLK_QSPI>, <&hp_clk>, <&hp_clk>,
> +				 <&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>;
>  			#clock-cells = <1>;
> -			clock-indices = <
> -				R8A7794_CLK_QSPI_MOD R8A7794_CLK_I2C5 R8A7794_CLK_I2C4
> -				R8A7794_CLK_I2C3 R8A7794_CLK_I2C2 R8A7794_CLK_I2C1
> -				R8A7794_CLK_I2C0
> -			>;
> +			clock-indices = <R8A7794_CLK_GPIO6 R8A7794_CLK_GPIO5
> +					 R8A7794_CLK_GPIO4 R8A7794_CLK_GPIO3
> +					 R8A7794_CLK_GPIO2 R8A7794_CLK_GPIO1
> +					 R8A7794_CLK_GPIO0 R8A7794_CLK_QSPI_MOD
> +					 R8A7794_CLK_I2C5 R8A7794_CLK_I2C4
> +					 R8A7794_CLK_I2C3 R8A7794_CLK_I2C2
> +					 R8A7794_CLK_I2C1 R8A7794_CLK_I2C0>;
>  			clock-output-names =
> -				"qspi_mod", "i2c5", "i2c4", "i2c3", "i2c2", "i2c1", "i2c0";
> +				"gpio6", "gpio5", "gpio4", "gpio3", "gpio2",
> +				"gpio1", "gpio0", "qspi_mod",
> +				"i2c5", "i2c4", "i2c3", "i2c2", "i2c1", "i2c0";
>  		};
>  		mstp11_clks: mstp11_clks@e615099c {
>  			compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-
clocks";
diff mbox

Patch

Index: renesas/arch/arm/boot/dts/r8a7794.dtsi
===================================================================
--- renesas.orig/arch/arm/boot/dts/r8a7794.dtsi
+++ renesas/arch/arm/boot/dts/r8a7794.dtsi
@@ -651,16 +651,22 @@ 
 		mstp9_clks: mstp9_clks@e6150994 {
 			compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
 			reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
-			clocks = <&cpg_clocks R8A7794_CLK_QSPI>, <&hp_clk>, <&hp_clk>,
-				<&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>;
+			clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>,
+				 <&cp_clk>, <&cp_clk>, <&cp_clk>,
+				 <&cpg_clocks R8A7794_CLK_QSPI>, <&hp_clk>, <&hp_clk>,
+				 <&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>;
 			#clock-cells = <1>;
-			clock-indices = <
-				R8A7794_CLK_QSPI_MOD R8A7794_CLK_I2C5 R8A7794_CLK_I2C4
-				R8A7794_CLK_I2C3 R8A7794_CLK_I2C2 R8A7794_CLK_I2C1
-				R8A7794_CLK_I2C0
-			>;
+			clock-indices = <R8A7794_CLK_GPIO6 R8A7794_CLK_GPIO5
+					 R8A7794_CLK_GPIO4 R8A7794_CLK_GPIO3
+					 R8A7794_CLK_GPIO2 R8A7794_CLK_GPIO1
+					 R8A7794_CLK_GPIO0 R8A7794_CLK_QSPI_MOD
+					 R8A7794_CLK_I2C5 R8A7794_CLK_I2C4
+					 R8A7794_CLK_I2C3 R8A7794_CLK_I2C2
+					 R8A7794_CLK_I2C1 R8A7794_CLK_I2C0>;
 			clock-output-names =
-				"qspi_mod", "i2c5", "i2c4", "i2c3", "i2c2", "i2c1", "i2c0";
+				"gpio6", "gpio5", "gpio4", "gpio3", "gpio2",
+				"gpio1", "gpio0", "qspi_mod",
+				"i2c5", "i2c4", "i2c3", "i2c2", "i2c1", "i2c0";
 		};
 		mstp11_clks: mstp11_clks@e615099c {
 			compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";