Message ID | 1423855427-2098-6-git-send-email-przanoni@gmail.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> On Fri, Feb 13, 2015 at 11:23 AM, Paulo Zanoni <przanoni@gmail.com> wrote: > From: Paulo Zanoni <paulo.r.zanoni@intel.com> > > We need this for FBC, and possibly for PSR too. > > v2: Don't only flush: invalidate too (Daniel). > > Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> > --- > drivers/gpu/drm/i915/i915_gem.c | 23 ++++++++++++++++++----- > 1 file changed, 18 insertions(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c > index 8b1cda6..ca979b1 100644 > --- a/drivers/gpu/drm/i915/i915_gem.c > +++ b/drivers/gpu/drm/i915/i915_gem.c > @@ -351,7 +351,7 @@ i915_gem_phys_pwrite(struct drm_i915_gem_object *obj, > struct drm_device *dev = obj->base.dev; > void *vaddr = obj->phys_handle->vaddr + args->offset; > char __user *user_data = to_user_ptr(args->data_ptr); > - int ret; > + int ret = 0; > > /* We manually control the domain here and pretend that it > * remains coherent i.e. in the GTT domain, like shmem_pwrite. > @@ -360,6 +360,7 @@ i915_gem_phys_pwrite(struct drm_i915_gem_object *obj, > if (ret) > return ret; > > + intel_fb_obj_invalidate(obj, NULL, ORIGIN_CPU); > if (__copy_from_user_inatomic_nocache(vaddr, user_data, args->size)) { > unsigned long unwritten; > > @@ -370,13 +371,18 @@ i915_gem_phys_pwrite(struct drm_i915_gem_object *obj, > mutex_unlock(&dev->struct_mutex); > unwritten = copy_from_user(vaddr, user_data, args->size); > mutex_lock(&dev->struct_mutex); > - if (unwritten) > - return -EFAULT; > + if (unwritten) { > + ret = -EFAULT; > + goto out; > + } > } > > drm_clflush_virt_range(vaddr, args->size); > i915_gem_chipset_flush(dev); > - return 0; > + > +out: > + intel_fb_obj_flush(obj, false); > + return ret; > } > > void *i915_gem_object_alloc(struct drm_device *dev) > @@ -810,6 +816,8 @@ i915_gem_gtt_pwrite_fast(struct drm_device *dev, > > offset = i915_gem_obj_ggtt_offset(obj) + args->offset; > > + intel_fb_obj_invalidate(obj, NULL, ORIGIN_GTT); > + > while (remain > 0) { > /* Operation in this page > * > @@ -830,7 +838,7 @@ i915_gem_gtt_pwrite_fast(struct drm_device *dev, > if (fast_user_write(dev_priv->gtt.mappable, page_base, > page_offset, user_data, page_length)) { > ret = -EFAULT; > - goto out_unpin; > + goto out_flush; > } > > remain -= page_length; > @@ -838,6 +846,8 @@ i915_gem_gtt_pwrite_fast(struct drm_device *dev, > offset += page_length; > } > > +out_flush: > + intel_fb_obj_flush(obj, false); > out_unpin: > i915_gem_object_ggtt_unpin(obj); > out: > @@ -952,6 +962,8 @@ i915_gem_shmem_pwrite(struct drm_device *dev, > if (ret) > return ret; > > + intel_fb_obj_invalidate(obj, NULL, ORIGIN_CPU); > + > i915_gem_object_pin_pages(obj); > > offset = args->offset; > @@ -1030,6 +1042,7 @@ out: > if (needs_clflush_after) > i915_gem_chipset_flush(dev); > > + intel_fb_obj_flush(obj, false); > return ret; > } > > -- > 2.1.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
On Tue, Mar 03, 2015 at 04:47:33PM -0800, Rodrigo Vivi wrote: > Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> > > On Fri, Feb 13, 2015 at 11:23 AM, Paulo Zanoni <przanoni@gmail.com> wrote: > > From: Paulo Zanoni <paulo.r.zanoni@intel.com> > > > > We need this for FBC, and possibly for PSR too. > > > > v2: Don't only flush: invalidate too (Daniel). > > > > Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Merged up to this patch, thanks. -Daniel > > --- > > drivers/gpu/drm/i915/i915_gem.c | 23 ++++++++++++++++++----- > > 1 file changed, 18 insertions(+), 5 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c > > index 8b1cda6..ca979b1 100644 > > --- a/drivers/gpu/drm/i915/i915_gem.c > > +++ b/drivers/gpu/drm/i915/i915_gem.c > > @@ -351,7 +351,7 @@ i915_gem_phys_pwrite(struct drm_i915_gem_object *obj, > > struct drm_device *dev = obj->base.dev; > > void *vaddr = obj->phys_handle->vaddr + args->offset; > > char __user *user_data = to_user_ptr(args->data_ptr); > > - int ret; > > + int ret = 0; > > > > /* We manually control the domain here and pretend that it > > * remains coherent i.e. in the GTT domain, like shmem_pwrite. > > @@ -360,6 +360,7 @@ i915_gem_phys_pwrite(struct drm_i915_gem_object *obj, > > if (ret) > > return ret; > > > > + intel_fb_obj_invalidate(obj, NULL, ORIGIN_CPU); > > if (__copy_from_user_inatomic_nocache(vaddr, user_data, args->size)) { > > unsigned long unwritten; > > > > @@ -370,13 +371,18 @@ i915_gem_phys_pwrite(struct drm_i915_gem_object *obj, > > mutex_unlock(&dev->struct_mutex); > > unwritten = copy_from_user(vaddr, user_data, args->size); > > mutex_lock(&dev->struct_mutex); > > - if (unwritten) > > - return -EFAULT; > > + if (unwritten) { > > + ret = -EFAULT; > > + goto out; > > + } > > } > > > > drm_clflush_virt_range(vaddr, args->size); > > i915_gem_chipset_flush(dev); > > - return 0; > > + > > +out: > > + intel_fb_obj_flush(obj, false); > > + return ret; > > } > > > > void *i915_gem_object_alloc(struct drm_device *dev) > > @@ -810,6 +816,8 @@ i915_gem_gtt_pwrite_fast(struct drm_device *dev, > > > > offset = i915_gem_obj_ggtt_offset(obj) + args->offset; > > > > + intel_fb_obj_invalidate(obj, NULL, ORIGIN_GTT); > > + > > while (remain > 0) { > > /* Operation in this page > > * > > @@ -830,7 +838,7 @@ i915_gem_gtt_pwrite_fast(struct drm_device *dev, > > if (fast_user_write(dev_priv->gtt.mappable, page_base, > > page_offset, user_data, page_length)) { > > ret = -EFAULT; > > - goto out_unpin; > > + goto out_flush; > > } > > > > remain -= page_length; > > @@ -838,6 +846,8 @@ i915_gem_gtt_pwrite_fast(struct drm_device *dev, > > offset += page_length; > > } > > > > +out_flush: > > + intel_fb_obj_flush(obj, false); > > out_unpin: > > i915_gem_object_ggtt_unpin(obj); > > out: > > @@ -952,6 +962,8 @@ i915_gem_shmem_pwrite(struct drm_device *dev, > > if (ret) > > return ret; > > > > + intel_fb_obj_invalidate(obj, NULL, ORIGIN_CPU); > > + > > i915_gem_object_pin_pages(obj); > > > > offset = args->offset; > > @@ -1030,6 +1042,7 @@ out: > > if (needs_clflush_after) > > i915_gem_chipset_flush(dev); > > > > + intel_fb_obj_flush(obj, false); > > return ret; > > } > > > > -- > > 2.1.4 > > > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@lists.freedesktop.org > > http://lists.freedesktop.org/mailman/listinfo/intel-gfx > > > > -- > Rodrigo Vivi > Blog: http://blog.vivi.eng.br > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 8b1cda6..ca979b1 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -351,7 +351,7 @@ i915_gem_phys_pwrite(struct drm_i915_gem_object *obj, struct drm_device *dev = obj->base.dev; void *vaddr = obj->phys_handle->vaddr + args->offset; char __user *user_data = to_user_ptr(args->data_ptr); - int ret; + int ret = 0; /* We manually control the domain here and pretend that it * remains coherent i.e. in the GTT domain, like shmem_pwrite. @@ -360,6 +360,7 @@ i915_gem_phys_pwrite(struct drm_i915_gem_object *obj, if (ret) return ret; + intel_fb_obj_invalidate(obj, NULL, ORIGIN_CPU); if (__copy_from_user_inatomic_nocache(vaddr, user_data, args->size)) { unsigned long unwritten; @@ -370,13 +371,18 @@ i915_gem_phys_pwrite(struct drm_i915_gem_object *obj, mutex_unlock(&dev->struct_mutex); unwritten = copy_from_user(vaddr, user_data, args->size); mutex_lock(&dev->struct_mutex); - if (unwritten) - return -EFAULT; + if (unwritten) { + ret = -EFAULT; + goto out; + } } drm_clflush_virt_range(vaddr, args->size); i915_gem_chipset_flush(dev); - return 0; + +out: + intel_fb_obj_flush(obj, false); + return ret; } void *i915_gem_object_alloc(struct drm_device *dev) @@ -810,6 +816,8 @@ i915_gem_gtt_pwrite_fast(struct drm_device *dev, offset = i915_gem_obj_ggtt_offset(obj) + args->offset; + intel_fb_obj_invalidate(obj, NULL, ORIGIN_GTT); + while (remain > 0) { /* Operation in this page * @@ -830,7 +838,7 @@ i915_gem_gtt_pwrite_fast(struct drm_device *dev, if (fast_user_write(dev_priv->gtt.mappable, page_base, page_offset, user_data, page_length)) { ret = -EFAULT; - goto out_unpin; + goto out_flush; } remain -= page_length; @@ -838,6 +846,8 @@ i915_gem_gtt_pwrite_fast(struct drm_device *dev, offset += page_length; } +out_flush: + intel_fb_obj_flush(obj, false); out_unpin: i915_gem_object_ggtt_unpin(obj); out: @@ -952,6 +962,8 @@ i915_gem_shmem_pwrite(struct drm_device *dev, if (ret) return ret; + intel_fb_obj_invalidate(obj, NULL, ORIGIN_CPU); + i915_gem_object_pin_pages(obj); offset = args->offset; @@ -1030,6 +1042,7 @@ out: if (needs_clflush_after) i915_gem_chipset_flush(dev); + intel_fb_obj_flush(obj, false); return ret; }