Message ID | 1424954986-24450-5-git-send-email-akash.goel@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On Thu, Feb 26, 2015 at 06:19:40PM +0530, akash.goel@intel.com wrote: > From: Akash Goel <akash.goel@intel.com> > > On SKL, the frequency is programmed differently in RPNSWREQ (A008) > register (from bits 23 to 31, compared to bits 24 to 31). So updated > the gen6_set_rps function, as per this change. > > Signed-off-by: Akash Goel <akash.goel@intel.com> A bit hard to see since the GEN9_FREQUENCY() define was added in another patch, but checking that against the spec tells me the shift is correct. Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > drivers/gpu/drm/i915/intel_pm.c | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index 9dcfca6..339a034 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -3798,7 +3798,10 @@ static void gen6_set_rps(struct drm_device *dev, u8 val) > if (val != dev_priv->rps.cur_freq) { > gen6_set_rps_thresholds(dev_priv, val); > > - if (IS_HASWELL(dev) || IS_BROADWELL(dev)) > + if (IS_GEN9(dev)) > + I915_WRITE(GEN6_RPNSWREQ, > + GEN9_FREQUENCY(val)); > + else if (IS_HASWELL(dev) || IS_BROADWELL(dev)) > I915_WRITE(GEN6_RPNSWREQ, > HSW_FREQUENCY(val)); > else > -- > 1.9.2 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 9dcfca6..339a034 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -3798,7 +3798,10 @@ static void gen6_set_rps(struct drm_device *dev, u8 val) if (val != dev_priv->rps.cur_freq) { gen6_set_rps_thresholds(dev_priv, val); - if (IS_HASWELL(dev) || IS_BROADWELL(dev)) + if (IS_GEN9(dev)) + I915_WRITE(GEN6_RPNSWREQ, + GEN9_FREQUENCY(val)); + else if (IS_HASWELL(dev) || IS_BROADWELL(dev)) I915_WRITE(GEN6_RPNSWREQ, HSW_FREQUENCY(val)); else