diff mbox

[RFC/PATCHv2,1/3] spi: dw-spi: Single Register read to clear IRQs

Message ID 1425685594-26595-2-git-send-email-tthayer@opensource.altera.com (mailing list archive)
State Accepted
Commit 2306509605d3cb45b8480089af2d282600650e9e
Headers show

Commit Message

tthayer@opensource.altera.com March 6, 2015, 11:46 p.m. UTC
From: Thor Thayer <tthayer@opensource.altera.com>

Instead of clearing the RxU, RxO, and TxO IRQs individually with
3 register reads, a single read of the ICR register will do the
same thing.

Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@intel.com>
---
 drivers/spi/spi-dw.c |    4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

Comments

Andy Shevchenko March 7, 2015, 7:46 p.m. UTC | #1
On Sat, Mar 7, 2015 at 1:46 AM,  <tthayer@opensource.altera.com> wrote:
> From: Thor Thayer <tthayer@opensource.altera.com>
>
> Instead of clearing the RxU, RxO, and TxO IRQs individually with
> 3 register reads, a single read of the ICR register will do the
> same thing.
>
> Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
> Signed-off-by: Andy Shevchenko <andriy.shevchenko@intel.com>

Rather Suggested-by: …

Otherwise,
Acked-by: Andy Shevchenko <andy.shevchenko@gmail.com>

> ---
>  drivers/spi/spi-dw.c |    4 +---
>  1 file changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/drivers/spi/spi-dw.c b/drivers/spi/spi-dw.c
> index 950bc50..c5fa2be 100644
> --- a/drivers/spi/spi-dw.c
> +++ b/drivers/spi/spi-dw.c
> @@ -258,9 +258,7 @@ static irqreturn_t interrupt_transfer(struct dw_spi *dws)
>
>         /* Error handling */
>         if (irq_status & (SPI_INT_TXOI | SPI_INT_RXOI | SPI_INT_RXUI)) {
> -               dw_readw(dws, DW_SPI_TXOICR);
> -               dw_readw(dws, DW_SPI_RXOICR);
> -               dw_readw(dws, DW_SPI_RXUICR);
> +               dw_readw(dws, DW_SPI_ICR);
>                 int_error_stop(dws, "interrupt_transfer: fifo overrun/underrun");
>                 return IRQ_HANDLED;
>         }
> --
> 1.7.9.5
>
> --
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Mark Brown March 9, 2015, 6:43 p.m. UTC | #2
On Fri, Mar 06, 2015 at 05:46:32PM -0600, tthayer@opensource.altera.com wrote:
> From: Thor Thayer <tthayer@opensource.altera.com>
> 
> Instead of clearing the RxU, RxO, and TxO IRQs individually with
> 3 register reads, a single read of the ICR register will do the
> same thing.

Applied, thanks.
diff mbox

Patch

diff --git a/drivers/spi/spi-dw.c b/drivers/spi/spi-dw.c
index 950bc50..c5fa2be 100644
--- a/drivers/spi/spi-dw.c
+++ b/drivers/spi/spi-dw.c
@@ -258,9 +258,7 @@  static irqreturn_t interrupt_transfer(struct dw_spi *dws)
 
 	/* Error handling */
 	if (irq_status & (SPI_INT_TXOI | SPI_INT_RXOI | SPI_INT_RXUI)) {
-		dw_readw(dws, DW_SPI_TXOICR);
-		dw_readw(dws, DW_SPI_RXOICR);
-		dw_readw(dws, DW_SPI_RXUICR);
+		dw_readw(dws, DW_SPI_ICR);
 		int_error_stop(dws, "interrupt_transfer: fifo overrun/underrun");
 		return IRQ_HANDLED;
 	}