| Message ID | 1425620244-12637-12-git-send-email-akash.goel@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Task id: 5902
-------------------------------------Summary-------------------------------------
Platform Delta drm-intel-nightly Series Applied
PNV -1 280/280 279/280
ILK 308/308 308/308
SNB -21 328/328 307/328
IVB 379/379 379/379
BYT 294/294 294/294
HSW -2 387/387 385/387
BDW -1 316/316 315/316
-------------------------------------Detailed-------------------------------------
Platform Test drm-intel-nightly Series Applied
PNV igt_gem_userptr_blits_minor-unsync-normal DMESG_WARN(1)PASS(6) DMESG_WARN(1)PASS(1)
SNB igt_kms_cursor_crc_cursor-size-change NSPT(2)DMESG_WARN(1)PASS(3) NSPT(2)
SNB igt_kms_mmio_vs_cs_flip_setcrtc_vs_cs_flip NSPT(2)DMESG_WARN(1)PASS(3) NSPT(2)
SNB igt_kms_mmio_vs_cs_flip_setplane_vs_cs_flip NSPT(2)DMESG_WARN(1)PASS(3) NSPT(2)
SNB igt_kms_rotation_crc_primary-rotation NSPT(3)DMESG_WARN(1)PASS(3) NSPT(2)
SNB igt_kms_rotation_crc_sprite-rotation NSPT(3)DMESG_WARN(1)PASS(4) NSPT(2)
SNB igt_pm_rpm_cursor NSPT(3)DMESG_WARN(1)PASS(3) NSPT(2)
SNB igt_pm_rpm_cursor-dpms NSPT(3)DMESG_WARN(1)PASS(3) NSPT(2)
SNB igt_pm_rpm_dpms-mode-unset-non-lpsp NSPT(3)DMESG_WARN(1)PASS(3) NSPT(2)
SNB igt_pm_rpm_dpms-non-lpsp NSPT(3)DMESG_WARN(1)PASS(3) NSPT(2)
SNB igt_pm_rpm_drm-resources-equal NSPT(3)DMESG_WARN(1)PASS(3) NSPT(2)
SNB igt_pm_rpm_fences NSPT(3)DMESG_WARN(1)PASS(3) NSPT(2)
SNB igt_pm_rpm_fences-dpms NSPT(3)DMESG_WARN(1)PASS(3) NSPT(2)
SNB igt_pm_rpm_gem-execbuf NSPT(3)DMESG_WARN(1)PASS(3) NSPT(2)
SNB igt_pm_rpm_gem-mmap-cpu NSPT(3)DMESG_WARN(1)PASS(3) NSPT(2)
SNB igt_pm_rpm_gem-mmap-gtt NSPT(3)DMESG_WARN(1)PASS(3) NSPT(2)
SNB igt_pm_rpm_gem-pread NSPT(3)DMESG_WARN(1)PASS(1) NSPT(2)
SNB igt_pm_rpm_i2c NSPT(3)DMESG_WARN(1)PASS(1) NSPT(2)
SNB igt_pm_rpm_modeset-non-lpsp NSPT(3)DMESG_WARN(1)PASS(1) NSPT(2)
SNB igt_pm_rpm_modeset-non-lpsp-stress-no-wait NSPT(3)DMESG_WARN(1)PASS(1) NSPT(2)
SNB igt_pm_rpm_pci-d3-state NSPT(3)DMESG_WARN(1)PASS(1) NSPT(2)
SNB igt_pm_rpm_rte NSPT(3)DMESG_WARN(1)PASS(1) NSPT(2)
*HSW igt_gem_seqno_wrap PASS(2) DMESG_WARN(1)PASS(1)
*HSW igt_gem_storedw_loop_blt PASS(2) DMESG_WARN(1)PASS(1)
*BDW igt_gem_gtt_hog PASS(7) DMESG_WARN(1)PASS(1)
Note: You need to pay more attention to line start with '*'
On 03/05/2015 09:37 PM, akash.goel@intel.com wrote: > From: Akash Goel <akash.goel@intel.com> > > Enable the RPS interrupts programming(enable/disable/reset) for GEN9, > as missing changes to enable the RPS support on GEN9 have been added. > > Signed-off-by: Akash Goel <akash.goel@intel.com> > --- > drivers/gpu/drm/i915/intel_pm.c | 17 +++-------------- > 1 file changed, 3 insertions(+), 14 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index 6273c282..3692837 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -5629,12 +5629,7 @@ static void gen6_suspend_rps(struct drm_device *dev) > > flush_delayed_work(&dev_priv->rps.delayed_resume_work); > > - /* > - * TODO: disable RPS interrupts on GEN9+ too once RPS support > - * is added for it. > - */ > - if (INTEL_INFO(dev)->gen < 9) > - gen6_disable_rps_interrupts(dev); > + gen6_disable_rps_interrupts(dev); > } > > /** > @@ -5692,12 +5687,7 @@ static void intel_gen6_powersave_work(struct work_struct *work) > > mutex_lock(&dev_priv->rps.hw_lock); > > - /* > - * TODO: reset/enable RPS interrupts on GEN9+ too, once RPS support is > - * added for it. > - */ > - if (INTEL_INFO(dev)->gen < 9) > - gen6_reset_rps_interrupts(dev); > + gen6_reset_rps_interrupts(dev); > > if (IS_CHERRYVIEW(dev)) { > cherryview_enable_rps(dev); > @@ -5716,8 +5706,7 @@ static void intel_gen6_powersave_work(struct work_struct *work) > } > dev_priv->rps.enabled = true; > > - if (INTEL_INFO(dev)->gen < 9) > - gen6_enable_rps_interrupts(dev); > + gen6_enable_rps_interrupts(dev); > > mutex_unlock(&dev_priv->rps.hw_lock); > > Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
On Wed, Mar 11, 2015 at 02:12:02PM -0700, Jesse Barnes wrote: > On 03/05/2015 09:37 PM, akash.goel@intel.com wrote: > > From: Akash Goel <akash.goel@intel.com> > > > > Enable the RPS interrupts programming(enable/disable/reset) for GEN9, > > as missing changes to enable the RPS support on GEN9 have been added. > > > > Signed-off-by: Akash Goel <akash.goel@intel.com> > > --- > > drivers/gpu/drm/i915/intel_pm.c | 17 +++-------------- > > 1 file changed, 3 insertions(+), 14 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > > index 6273c282..3692837 100644 > > --- a/drivers/gpu/drm/i915/intel_pm.c > > +++ b/drivers/gpu/drm/i915/intel_pm.c > > @@ -5629,12 +5629,7 @@ static void gen6_suspend_rps(struct drm_device *dev) > > > > flush_delayed_work(&dev_priv->rps.delayed_resume_work); > > > > - /* > > - * TODO: disable RPS interrupts on GEN9+ too once RPS support > > - * is added for it. > > - */ > > - if (INTEL_INFO(dev)->gen < 9) > > - gen6_disable_rps_interrupts(dev); > > + gen6_disable_rps_interrupts(dev); > > } > > > > /** > > @@ -5692,12 +5687,7 @@ static void intel_gen6_powersave_work(struct work_struct *work) > > > > mutex_lock(&dev_priv->rps.hw_lock); > > > > - /* > > - * TODO: reset/enable RPS interrupts on GEN9+ too, once RPS support is > > - * added for it. > > - */ > > - if (INTEL_INFO(dev)->gen < 9) > > - gen6_reset_rps_interrupts(dev); > > + gen6_reset_rps_interrupts(dev); > > > > if (IS_CHERRYVIEW(dev)) { > > cherryview_enable_rps(dev); > > @@ -5716,8 +5706,7 @@ static void intel_gen6_powersave_work(struct work_struct *work) > > } > > dev_priv->rps.enabled = true; > > > > - if (INTEL_INFO(dev)->gen < 9) > > - gen6_enable_rps_interrupts(dev); > > + gen6_enable_rps_interrupts(dev); > > > > mutex_unlock(&dev_priv->rps.hw_lock); > > > > > > Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Merged the remaining four, thanks for patches&review. -Daniel
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 6273c282..3692837 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -5629,12 +5629,7 @@ static void gen6_suspend_rps(struct drm_device *dev) flush_delayed_work(&dev_priv->rps.delayed_resume_work); - /* - * TODO: disable RPS interrupts on GEN9+ too once RPS support - * is added for it. - */ - if (INTEL_INFO(dev)->gen < 9) - gen6_disable_rps_interrupts(dev); + gen6_disable_rps_interrupts(dev); } /** @@ -5692,12 +5687,7 @@ static void intel_gen6_powersave_work(struct work_struct *work) mutex_lock(&dev_priv->rps.hw_lock); - /* - * TODO: reset/enable RPS interrupts on GEN9+ too, once RPS support is - * added for it. - */ - if (INTEL_INFO(dev)->gen < 9) - gen6_reset_rps_interrupts(dev); + gen6_reset_rps_interrupts(dev); if (IS_CHERRYVIEW(dev)) { cherryview_enable_rps(dev); @@ -5716,8 +5706,7 @@ static void intel_gen6_powersave_work(struct work_struct *work) } dev_priv->rps.enabled = true; - if (INTEL_INFO(dev)->gen < 9) - gen6_enable_rps_interrupts(dev); + gen6_enable_rps_interrupts(dev); mutex_unlock(&dev_priv->rps.hw_lock);