Message ID | 1427998729-30794-1-git-send-email-jbarnes@virtuousgeek.org (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On Thu, Apr 02, 2015 at 11:18:49AM -0700, Jesse Barnes wrote: > I guess this is a lie for 8xx, but newer stuff takes care of this for > us. > > References: https://bugs.freedesktop.org/show_bug.cgi?id=89792 > Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> > --- > drivers/gpu/drm/i915/i915_debugfs.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c > index 91c945b..a8f42a7 100644 > --- a/drivers/gpu/drm/i915/i915_debugfs.c > +++ b/drivers/gpu/drm/i915/i915_debugfs.c > @@ -1686,6 +1686,8 @@ static int i915_sr_status(struct seq_file *m, void *unused) > sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN; > else if (IS_PINEVIEW(dev)) > sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN; > + else > + sr_enabled = true; /* other platforms don't need enabling */ Not true actually. The line between maxfifo and SR is a blurry one. We treat them as the same thing. So I think this should just read out whatever registers we set up in intel_set_memory_cxsr(). On ILK+ it should actually check if LP1+ watermarks are enabled or not. And I can't recall enough details on SKL right now to have an idea what should be done there. That's all assuming we want this file to be at least somewhat useful. I think the other good option is to just remove the file entirely and depend on the new intel_watermark tool I wrote recently. > > intel_runtime_pm_put(dev_priv); > > -- > 1.9.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
On 04/02/2015 11:42 AM, Ville Syrjälä wrote: > On Thu, Apr 02, 2015 at 11:18:49AM -0700, Jesse Barnes wrote: >> I guess this is a lie for 8xx, but newer stuff takes care of this for >> us. >> >> References: https://bugs.freedesktop.org/show_bug.cgi?id=89792 >> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> >> --- >> drivers/gpu/drm/i915/i915_debugfs.c | 2 ++ >> 1 file changed, 2 insertions(+) >> >> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c >> index 91c945b..a8f42a7 100644 >> --- a/drivers/gpu/drm/i915/i915_debugfs.c >> +++ b/drivers/gpu/drm/i915/i915_debugfs.c >> @@ -1686,6 +1686,8 @@ static int i915_sr_status(struct seq_file *m, void *unused) >> sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN; >> else if (IS_PINEVIEW(dev)) >> sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN; >> + else >> + sr_enabled = true; /* other platforms don't need enabling */ > > Not true actually. > > The line between maxfifo and SR is a blurry one. We treat them as the > same thing. So I think this should just read out whatever registers > we set up in intel_set_memory_cxsr(). > > On ILK+ it should actually check if LP1+ watermarks are enabled or not. > And I can't recall enough details on SKL right now to have an idea what > should be done there. > > That's all assuming we want this file to be at least somewhat useful. > I think the other good option is to just remove the file entirely and > depend on the new intel_watermark tool I wrote recently. Yeah, that might be a better option. And beyond just this we want SR residency anyway, so finding the debug regs for that and making a tool is a better long term solution. Jesse
Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Task id: 6125
-------------------------------------Summary-------------------------------------
Platform Delta drm-intel-nightly Series Applied
PNV -3 272/272 269/272
ILK 302/302 302/302
SNB 303/303 303/303
IVB 338/338 338/338
BYT -1 287/287 286/287
HSW 361/361 361/361
BDW 308/308 308/308
-------------------------------------Detailed-------------------------------------
Platform Test drm-intel-nightly Series Applied
PNV igt@gem_tiled_pread_pwrite FAIL(3)PASS(10) FAIL(1)PASS(1)
PNV igt@gem_userptr_blits@coherency-sync CRASH(5)PASS(7) CRASH(1)PASS(1)
PNV igt@gen3_render_tiledx_blits FAIL(6)PASS(5) FAIL(1)PASS(1)
*BYT igt@gem_exec_bad_domains@conflicting-write-domain PASS(17) FAIL(1)PASS(1)
Note: You need to pay more attention to line start with '*'
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 91c945b..a8f42a7 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -1686,6 +1686,8 @@ static int i915_sr_status(struct seq_file *m, void *unused) sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN; else if (IS_PINEVIEW(dev)) sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN; + else + sr_enabled = true; /* other platforms don't need enabling */ intel_runtime_pm_put(dev_priv);
I guess this is a lie for 8xx, but newer stuff takes care of this for us. References: https://bugs.freedesktop.org/show_bug.cgi?id=89792 Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> --- drivers/gpu/drm/i915/i915_debugfs.c | 2 ++ 1 file changed, 2 insertions(+)