diff mbox

ARM: dts: omap5-uevm: Add Uart wakeup interrupt

Message ID 1431727161-16870-1-git-send-email-nm@ti.com (mailing list archive)
State New, archived
Headers show

Commit Message

Nishanth Menon May 15, 2015, 9:59 p.m. UTC
UART3 wakeup takes place with iodaisy chain. enable the wakeup pin.

Reported-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
---

Test on linus master (f0897f4cc0fc) with 8250  driver: http://pastebin.ubuntu.com/11154446/

Applies on next-20150515 and linus master (f0897f4cc0fc)

 arch/arm/boot/dts/omap5-uevm.dts |    2 ++
 1 file changed, 2 insertions(+)

Comments

Nishanth Menon May 15, 2015, 10:01 p.m. UTC | #1
On 05/15/2015 04:59 PM, Nishanth Menon wrote:
> UART3 wakeup takes place with iodaisy chain. enable the wakeup pin.
> 
> Reported-by: Suman Anna <s-anna@ti.com>
> Signed-off-by: Nishanth Menon <nm@ti.com>
> ---
> 
> Test on linus master (f0897f4cc0fc) with 8250  driver: http://pastebin.ubuntu.com/11154446/
> 
> Applies on next-20150515 and linus master (f0897f4cc0fc)
> 
>  arch/arm/boot/dts/omap5-uevm.dts |    2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/omap5-uevm.dts b/arch/arm/boot/dts/omap5-uevm.dts
> index 74777a6e200a..214190796143 100644
> --- a/arch/arm/boot/dts/omap5-uevm.dts
> +++ b/arch/arm/boot/dts/omap5-uevm.dts
> @@ -604,6 +604,8 @@
>  &uart3 {
>          pinctrl-names = "default";
>          pinctrl-0 = <&uart3_pins>;
> +	interrupts-extended = <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
I think I should have used WUGEN here! Sorry about that.. just noticed
in the log
308:        259          0       GIC 106 Level     serial

Sorry about that.
> +			      <&omap5_pmx_core 0x19c>;
>  };
>  
>  &uart5 {
>
diff mbox

Patch

diff --git a/arch/arm/boot/dts/omap5-uevm.dts b/arch/arm/boot/dts/omap5-uevm.dts
index 74777a6e200a..214190796143 100644
--- a/arch/arm/boot/dts/omap5-uevm.dts
+++ b/arch/arm/boot/dts/omap5-uevm.dts
@@ -604,6 +604,8 @@ 
 &uart3 {
         pinctrl-names = "default";
         pinctrl-0 = <&uart3_pins>;
+	interrupts-extended = <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
+			      <&omap5_pmx_core 0x19c>;
 };
 
 &uart5 {