| Message ID | 1431822574.4222.172.camel@xylophone.i.decadent.org.uk (mailing list archive) |
|---|---|
| State | Deferred |
| Delegated to: | Simon Horman |
| Headers | show |
On Sun, May 17, 2015 at 2:29 AM, Ben Hutchings <ben.hutchings@codethink.co.uk> wrote: > From: Ben Dooks <ben.dooks@codethink.co.uk> > > [bwh: Fold in fix from Ian Molton] > Signed-off-by: Ben Hutchings <ben.hutchings@codethink.co.uk> > --- > arch/arm/boot/dts/r8a7790-lager.dts | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts > index aaa4f258e279..343ec0ccc8df 100644 > --- a/arch/arm/boot/dts/r8a7790-lager.dts > +++ b/arch/arm/boot/dts/r8a7790-lager.dts > @@ -413,6 +413,11 @@ > vmmc-supply = <&fixedregulator3v3>; > bus-width = <8>; > non-removable; > + > + assigned-clocks = <&mstp3_clks R8A7790_CLK_MMCIF1>; > + assigned-clock-rates = <97500000>; > + max-frequency = <50000000>; Are all these properties Lager-specific, or r8a7790-specific? If the latter, they belong in r8a7790.dtsi. Same comment for the other nodes. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds -- To unsubscribe from this list: send the line "unsubscribe linux-sh" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Sun, 2015-05-17 at 10:13 +0200, Geert Uytterhoeven wrote: > On Sun, May 17, 2015 at 2:29 AM, Ben Hutchings > <ben.hutchings@codethink.co.uk> wrote: > > From: Ben Dooks <ben.dooks@codethink.co.uk> > > > > [bwh: Fold in fix from Ian Molton] > > Signed-off-by: Ben Hutchings <ben.hutchings@codethink.co.uk> > > --- > > arch/arm/boot/dts/r8a7790-lager.dts | 11 +++++++++++ > > 1 file changed, 11 insertions(+) > > > > diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts > > index aaa4f258e279..343ec0ccc8df 100644 > > --- a/arch/arm/boot/dts/r8a7790-lager.dts > > +++ b/arch/arm/boot/dts/r8a7790-lager.dts > > @@ -413,6 +413,11 @@ > > vmmc-supply = <&fixedregulator3v3>; > > bus-width = <8>; > > non-removable; > > + > > + assigned-clocks = <&mstp3_clks R8A7790_CLK_MMCIF1>; > > + assigned-clock-rates = <97500000>; > > + max-frequency = <50000000>; > > Are all these properties Lager-specific, or r8a7790-specific? > If the latter, they belong in r8a7790.dtsi. > Same comment for the other nodes. The clock assignments are not specific to Lager so they probably belong in r8a7790.dtsi; the dividers are configurable and could be board-specific. The board design could conceivably limit the usable frequency to below the chip's maximum, though presumably that won't usually happen. Currently the clk-rcar-gen2 driver only configures the dividers for sdhi{0,1}. That leaves the rest of them effectively controlled by the board's firmware. Ben. -- To unsubscribe from this list: send the line "unsubscribe linux-sh" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Mon, 2015-05-18 at 20:48 +0100, Ben Hutchings wrote: > On Sun, 2015-05-17 at 10:13 +0200, Geert Uytterhoeven wrote: > > On Sun, May 17, 2015 at 2:29 AM, Ben Hutchings > > <ben.hutchings@codethink.co.uk> wrote: > > > From: Ben Dooks <ben.dooks@codethink.co.uk> > > > > > > [bwh: Fold in fix from Ian Molton] > > > Signed-off-by: Ben Hutchings <ben.hutchings@codethink.co.uk> > > > --- > > > arch/arm/boot/dts/r8a7790-lager.dts | 11 +++++++++++ > > > 1 file changed, 11 insertions(+) > > > > > > diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts > > > index aaa4f258e279..343ec0ccc8df 100644 > > > --- a/arch/arm/boot/dts/r8a7790-lager.dts > > > +++ b/arch/arm/boot/dts/r8a7790-lager.dts > > > @@ -413,6 +413,11 @@ > > > vmmc-supply = <&fixedregulator3v3>; > > > bus-width = <8>; > > > non-removable; > > > + > > > + assigned-clocks = <&mstp3_clks R8A7790_CLK_MMCIF1>; > > > + assigned-clock-rates = <97500000>; > > > + max-frequency = <50000000>; > > > > Are all these properties Lager-specific, or r8a7790-specific? > > If the latter, they belong in r8a7790.dtsi. > > Same comment for the other nodes. > > The clock assignments are not specific to Lager so they probably belong > in r8a7790.dtsi; the dividers are configurable and could be > board-specific. The problem with doing that is I think the assigned-clocks and assigned-clock-rates properties belong together. I can't find any other instance where they are split between a .dtsi file and .dts files that include it. I *could* define both properties in r8a7790.dtsi and then let board .dts files override the clock rate if wanted. > The board design could conceivably limit the usable frequency to below > the chip's maximum, though presumably that won't usually happen. > Currently the clk-rcar-gen2 driver only configures the dividers for > sdhi{0,1}. That leaves the rest of them effectively controlled by the > board's firmware. I was mistaken about this; the other dividers are programmed by clk-div6. Ben. -- To unsubscribe from this list: send the line "unsubscribe linux-sh" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts index aaa4f258e279..343ec0ccc8df 100644 --- a/arch/arm/boot/dts/r8a7790-lager.dts +++ b/arch/arm/boot/dts/r8a7790-lager.dts @@ -413,6 +413,11 @@ vmmc-supply = <&fixedregulator3v3>; bus-width = <8>; non-removable; + + assigned-clocks = <&mstp3_clks R8A7790_CLK_MMCIF1>; + assigned-clock-rates = <97500000>; + max-frequency = <50000000>; + status = "okay"; }; @@ -488,6 +493,9 @@ pinctrl-0 = <&sdhi0_pins>; pinctrl-names = "default"; + assigned-clocks = <&mstp3_clks R8A7790_CLK_SDHI0>; + assigned-clock-rates = <156000000>; + vmmc-supply = <&vcc_sdhi0>; vqmmc-supply = <&vccq_sdhi0>; cd-gpios = <&gpio3 6 GPIO_ACTIVE_LOW>; @@ -498,6 +506,9 @@ pinctrl-0 = <&sdhi2_pins>; pinctrl-names = "default"; + assigned-clocks = <&mstp3_clks R8A7790_CLK_SDHI2>; + assigned-clock-rates = <97500000>; + vmmc-supply = <&vcc_sdhi2>; vqmmc-supply = <&vccq_sdhi2>; cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>;