Message ID | 1431844923-4654-2-git-send-email-t.dakhran@gmail.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Hi Tarek, On Sun, May 17, 2015 at 3:42 PM, Tarek Dakhran <t.dakhran@gmail.com> wrote: > Cortex-A7 has EXYNOS5_PA_UART base address for UART. > If system boots from Cortex-A7 CPU addruart loads wrong > address. This patch fixex this. > > Signed-off-by: Tarek Dakhran <t.dakhran@gmail.com> > --- > arch/arm/include/debug/exynos.S | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/arm/include/debug/exynos.S b/arch/arm/include/debug/exynos.S > index b17fdb7..a61b3ea 100644 > --- a/arch/arm/include/debug/exynos.S > +++ b/arch/arm/include/debug/exynos.S > @@ -24,6 +24,7 @@ > mrc p15, 0, \tmp, c0, c0, 0 > and \tmp, \tmp, #0xf0 > teq \tmp, #0xf0 @@ A15 > + teqne \tmp, #0x70 @@ A7 > ldreq \rp, =EXYNOS5_PA_UART > movne \rp, #EXYNOS4_PA_UART @@ EXYNOS4 > ldr \rv, =S3C_VA_UART > -- > 1.9.1 > Please see previous Joonyoung's patch. Your patch could break exynos3250 because it has not only two cortex-a7 cpus but also uses EXYOS4_PA_UART. http://www.spinics.net/lists/linux-samsung-soc/msg37318.html
Hi Chanho, On Mon, May 18, 2015 at 4:52 AM, Chanho Park <parkch98@gmail.com> wrote: > > Please see previous Joonyoung's patch. Your patch could break > exynos3250 because it has not only two cortex-a7 cpus but also uses > EXYOS4_PA_UART. > > http://www.spinics.net/lists/linux-samsung-soc/msg37318.html > Thanks, Joonyoung's patch works for me and it seems really reasonable to check cluster id. Best regards, Tarek -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/arch/arm/include/debug/exynos.S b/arch/arm/include/debug/exynos.S index b17fdb7..a61b3ea 100644 --- a/arch/arm/include/debug/exynos.S +++ b/arch/arm/include/debug/exynos.S @@ -24,6 +24,7 @@ mrc p15, 0, \tmp, c0, c0, 0 and \tmp, \tmp, #0xf0 teq \tmp, #0xf0 @@ A15 + teqne \tmp, #0x70 @@ A7 ldreq \rp, =EXYNOS5_PA_UART movne \rp, #EXYNOS4_PA_UART @@ EXYNOS4 ldr \rv, =S3C_VA_UART
Cortex-A7 has EXYNOS5_PA_UART base address for UART. If system boots from Cortex-A7 CPU addruart loads wrong address. This patch fixex this. Signed-off-by: Tarek Dakhran <t.dakhran@gmail.com> --- arch/arm/include/debug/exynos.S | 1 + 1 file changed, 1 insertion(+)