| Message ID | 1431356341-31640-8-git-send-email-antoine.tenart@free-electrons.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Sorry for the huge delay. On 05/11/2015 11:58 AM, Antoine Tenart wrote: > Add the full description of the Samsung K9GBG08U0A-M nand chip in the > nand_ids table. > > Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> > --- > drivers/mtd/nand/nand_ids.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/drivers/mtd/nand/nand_ids.c b/drivers/mtd/nand/nand_ids.c > index dd620c19c619..500c33e1db06 100644 > --- a/drivers/mtd/nand/nand_ids.c > +++ b/drivers/mtd/nand/nand_ids.c > @@ -50,6 +50,10 @@ struct nand_flash_dev nand_flash_ids[] = { > { .id = {0xad, 0xde, 0x94, 0xda, 0x74, 0xc4} }, > SZ_8K, SZ_8K, SZ_2M, 0, 6, 640, NAND_ECC_INFO(40, SZ_1K), > 4 }, > + {"NAND 4GiB 3,3V 8-bit", > + { .id = {0xec, 0xd7, 0x94, 0x76, 0x64, 0x43}, }, > + 8192, 4096, SZ_1M, LP_OPTIONS, 0, 0, NAND_ECC_INFO(40, SZ_1K), You should stick to SZ_8K and SZ_4K here. > + 4 }, > > LEGACY_ID_NAND("NAND 4MiB 5V 8-bit", 0x6B, 4, SZ_8K, SP_OPTIONS), > LEGACY_ID_NAND("NAND 4MiB 3,3V 8-bit", 0xE3, 4, SZ_8K, SP_OPTIONS), > I found a datasheet here for K9GBG08U0A that claims to support JEDEC device identification (i.e. 0x90 0x40 and 0xEC 0x40 commands). Have you tested it? Any reason you are adding full ID instead? How about you separate this patch from this series (so we can discuss and apply it separatedly)? Thanks,
On Sat, May 16, 2015 at 03:57:00PM -0300, Ezequiel Garcia wrote: > On 05/11/2015 11:58 AM, Antoine Tenart wrote: > > Add the full description of the Samsung K9GBG08U0A-M nand chip in the > > nand_ids table. > > > > Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> > > --- > > drivers/mtd/nand/nand_ids.c | 4 ++++ > > 1 file changed, 4 insertions(+) > > > > diff --git a/drivers/mtd/nand/nand_ids.c b/drivers/mtd/nand/nand_ids.c > > index dd620c19c619..500c33e1db06 100644 > > --- a/drivers/mtd/nand/nand_ids.c > > +++ b/drivers/mtd/nand/nand_ids.c > > @@ -50,6 +50,10 @@ struct nand_flash_dev nand_flash_ids[] = { > > { .id = {0xad, 0xde, 0x94, 0xda, 0x74, 0xc4} }, > > SZ_8K, SZ_8K, SZ_2M, 0, 6, 640, NAND_ECC_INFO(40, SZ_1K), > > 4 }, > > + {"NAND 4GiB 3,3V 8-bit", > > + { .id = {0xec, 0xd7, 0x94, 0x76, 0x64, 0x43}, }, > > + 8192, 4096, SZ_1M, LP_OPTIONS, 0, 0, NAND_ECC_INFO(40, SZ_1K), > > You should stick to SZ_8K and SZ_4K here. Right. > > > + 4 }, > > > > LEGACY_ID_NAND("NAND 4MiB 5V 8-bit", 0x6B, 4, SZ_8K, SP_OPTIONS), > > LEGACY_ID_NAND("NAND 4MiB 3,3V 8-bit", 0xE3, 4, SZ_8K, SP_OPTIONS), > > > > I found a datasheet here for K9GBG08U0A that claims to support JEDEC > device identification (i.e. 0x90 0x40 and 0xEC 0x40 commands). Have you > tested it? Any reason you are adding full ID instead? This nand looks like another one defined in this file, so a full ID make sure the right parameters applies here. Antoine
On 05/20/2015 11:06 AM, Antoine Tenart wrote: > On Sat, May 16, 2015 at 03:57:00PM -0300, Ezequiel Garcia wrote: >> On 05/11/2015 11:58 AM, Antoine Tenart wrote: >>> Add the full description of the Samsung K9GBG08U0A-M nand chip in the >>> nand_ids table. >>> >>> Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> >>> --- >>> drivers/mtd/nand/nand_ids.c | 4 ++++ >>> 1 file changed, 4 insertions(+) >>> >>> diff --git a/drivers/mtd/nand/nand_ids.c b/drivers/mtd/nand/nand_ids.c >>> index dd620c19c619..500c33e1db06 100644 >>> --- a/drivers/mtd/nand/nand_ids.c >>> +++ b/drivers/mtd/nand/nand_ids.c >>> @@ -50,6 +50,10 @@ struct nand_flash_dev nand_flash_ids[] = { >>> { .id = {0xad, 0xde, 0x94, 0xda, 0x74, 0xc4} }, >>> SZ_8K, SZ_8K, SZ_2M, 0, 6, 640, NAND_ECC_INFO(40, SZ_1K), >>> 4 }, >>> + {"NAND 4GiB 3,3V 8-bit", >>> + { .id = {0xec, 0xd7, 0x94, 0x76, 0x64, 0x43}, }, >>> + 8192, 4096, SZ_1M, LP_OPTIONS, 0, 0, NAND_ECC_INFO(40, SZ_1K), >> >> You should stick to SZ_8K and SZ_4K here. > > Right. > >> >>> + 4 }, >>> >>> LEGACY_ID_NAND("NAND 4MiB 5V 8-bit", 0x6B, 4, SZ_8K, SP_OPTIONS), >>> LEGACY_ID_NAND("NAND 4MiB 3,3V 8-bit", 0xE3, 4, SZ_8K, SP_OPTIONS), >>> >> >> I found a datasheet here for K9GBG08U0A that claims to support JEDEC >> device identification (i.e. 0x90 0x40 and 0xEC 0x40 commands). Have you >> tested it? Any reason you are adding full ID instead? > > This nand looks like another one defined in this file, so a full ID make > sure the right parameters applies here. > Oh, so you say the NAND detects the device ID and uses those parameters, instead of doing the JEDEC detection? Then I'd say NAND is broken and should be fixed. Brian, am I crazy?
On Wed, May 20, 2015 at 11:09:08AM -0300, Ezequiel Garcia wrote: > On 05/20/2015 11:06 AM, Antoine Tenart wrote: > > On Sat, May 16, 2015 at 03:57:00PM -0300, Ezequiel Garcia wrote: > >> On 05/11/2015 11:58 AM, Antoine Tenart wrote: > >>> Add the full description of the Samsung K9GBG08U0A-M nand chip in the > >>> nand_ids table. > >>> > >>> Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> > >>> --- > >>> drivers/mtd/nand/nand_ids.c | 4 ++++ > >>> 1 file changed, 4 insertions(+) > >>> > >>> diff --git a/drivers/mtd/nand/nand_ids.c b/drivers/mtd/nand/nand_ids.c > >>> index dd620c19c619..500c33e1db06 100644 > >>> --- a/drivers/mtd/nand/nand_ids.c > >>> +++ b/drivers/mtd/nand/nand_ids.c > >>> @@ -50,6 +50,10 @@ struct nand_flash_dev nand_flash_ids[] = { > >>> { .id = {0xad, 0xde, 0x94, 0xda, 0x74, 0xc4} }, > >>> SZ_8K, SZ_8K, SZ_2M, 0, 6, 640, NAND_ECC_INFO(40, SZ_1K), > >>> 4 }, > >>> + {"NAND 4GiB 3,3V 8-bit", > >>> + { .id = {0xec, 0xd7, 0x94, 0x76, 0x64, 0x43}, }, > >>> + 8192, 4096, SZ_1M, LP_OPTIONS, 0, 0, NAND_ECC_INFO(40, SZ_1K), > >> > >> You should stick to SZ_8K and SZ_4K here. > > > > Right. > > > >> > >>> + 4 }, > >>> > >>> LEGACY_ID_NAND("NAND 4MiB 5V 8-bit", 0x6B, 4, SZ_8K, SP_OPTIONS), > >>> LEGACY_ID_NAND("NAND 4MiB 3,3V 8-bit", 0xE3, 4, SZ_8K, SP_OPTIONS), > >>> > >> > >> I found a datasheet here for K9GBG08U0A that claims to support JEDEC > >> device identification (i.e. 0x90 0x40 and 0xEC 0x40 commands). Have you > >> tested it? Any reason you are adding full ID instead? > > > > This nand looks like another one defined in this file, so a full ID make > > sure the right parameters applies here. > > > > Oh, so you say the NAND detects the device ID and uses those parameters, > instead of doing the JEDEC detection? I just had a look on the datasheet, and I you're right, the nand should support JDEC. However I get a "No NAND device found" error when reverting this patch. It seems nand_flash_detect_jedec() is not reading "JDEC" and is returning directly. I'm having a look at this. Antoine
On Wed, May 20, 2015 at 04:24:09PM +0200, Antoine Tenart wrote: > On Wed, May 20, 2015 at 11:09:08AM -0300, Ezequiel Garcia wrote: > > On 05/20/2015 11:06 AM, Antoine Tenart wrote: > > > On Sat, May 16, 2015 at 03:57:00PM -0300, Ezequiel Garcia wrote: > > >> On 05/11/2015 11:58 AM, Antoine Tenart wrote: snip. > > >> I found a datasheet here for K9GBG08U0A that claims to support JEDEC > > >> device identification (i.e. 0x90 0x40 and 0xEC 0x40 commands). Have you > > >> tested it? Any reason you are adding full ID instead? > > > > > > This nand looks like another one defined in this file, so a full ID make > > > sure the right parameters applies here. > > > > > > > Oh, so you say the NAND detects the device ID and uses those parameters, > > instead of doing the JEDEC detection? > > I just had a look on the datasheet, and I you're right, the nand should > support JDEC. However I get a "No NAND device found" error when > reverting this patch. > > It seems nand_flash_detect_jedec() is not reading "JDEC" and is returning > directly. I'm having a look at this. So, I can read 'J', 'E', 'D' and 'E' but then I got 0xff's. So I tried to only check of JEDE in nand_flash_detect_jedec() but the JEDEC parameter page was then not valid. Antoine
diff --git a/drivers/mtd/nand/nand_ids.c b/drivers/mtd/nand/nand_ids.c index dd620c19c619..500c33e1db06 100644 --- a/drivers/mtd/nand/nand_ids.c +++ b/drivers/mtd/nand/nand_ids.c @@ -50,6 +50,10 @@ struct nand_flash_dev nand_flash_ids[] = { { .id = {0xad, 0xde, 0x94, 0xda, 0x74, 0xc4} }, SZ_8K, SZ_8K, SZ_2M, 0, 6, 640, NAND_ECC_INFO(40, SZ_1K), 4 }, + {"NAND 4GiB 3,3V 8-bit", + { .id = {0xec, 0xd7, 0x94, 0x76, 0x64, 0x43}, }, + 8192, 4096, SZ_1M, LP_OPTIONS, 0, 0, NAND_ECC_INFO(40, SZ_1K), + 4 }, LEGACY_ID_NAND("NAND 4MiB 5V 8-bit", 0x6B, 4, SZ_8K, SP_OPTIONS), LEGACY_ID_NAND("NAND 4MiB 3,3V 8-bit", 0xE3, 4, SZ_8K, SP_OPTIONS),
Add the full description of the Samsung K9GBG08U0A-M nand chip in the nand_ids table. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> --- drivers/mtd/nand/nand_ids.c | 4 ++++ 1 file changed, 4 insertions(+)