Message ID | 1434412379-11623-12-git-send-email-vicki.milhoan@freescale.com (mailing list archive) |
---|---|
State | Accepted |
Delegated to: | Herbert Xu |
Headers | show |
On Mon, Jun 15, 2015 at 04:52:59PM -0700, Victoria Milhoan wrote: > From: Steve Cornelius <steve.cornelius@freescale.com> > > The hwrng output buffers (2) are cast inside of a a struct (caam_rng_ctx) > allocated in one DMA-tagged region. While the kernel's heap allocator > should place the overall struct on a cacheline aligned boundary, the 2 > buffers contained within may not necessarily align. Consenquently, the ends > of unaligned buffers may not fully flush, and if so, stale data will be left > behind, resulting in small repeating patterns. Applied to crypto with stable CC.
diff --git a/drivers/crypto/caam/caamrng.c b/drivers/crypto/caam/caamrng.c index a8c4af9..dbec737 100644 --- a/drivers/crypto/caam/caamrng.c +++ b/drivers/crypto/caam/caamrng.c @@ -56,7 +56,7 @@ /* Buffer, its dma address and lock */ struct buf_data { - u8 buf[RN_BUF_SIZE]; + u8 buf[RN_BUF_SIZE] ____cacheline_aligned; dma_addr_t addr; struct completion filled; u32 hw_desc[DESC_JOB_O_LEN];