| Message ID | 1438088022-17350-1-git-send-email-srinivas.kandagatla@linaro.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 07/28/2015 05:53 AM, Srinivas Kandagatla wrote: > + > + sdcc4_pwrseq:pwrseq { Missing space here between label and node name. > + compatible = "mmc-pwrseq-simple"; > + reset-gpios = <&pm8921_gpio 43 GPIO_ACTIVE_LOW>; > + }; > + Also this node is not part of the SoC so it should be in the root, possibly under some sort of power-sequences node so that all the sequences are grouped in one place.
On Tue 28 Jul 05:53 PDT 2015, Srinivas Kandagatla wrote: > This patch adds pwrseq for WLAN which resets the WLAN just before the > SDIO bus is up. > Does this mean that we have the !power-of-2 patch in mmc on the way? > Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> > --- > arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 24 ++++++++++++++++++++++++ > 1 file changed, 24 insertions(+) > > diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts > index 88d6655..df560cf 100644 > --- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts > +++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts > @@ -1,5 +1,6 @@ > #include "qcom-apq8064-v2.0.dtsi" > #include <dt-bindings/gpio/gpio.h> > +#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> > > / { > model = "Qualcomm APQ8064/IFC6410"; > @@ -206,6 +207,28 @@ > status = "okay"; > }; > > + qcom,ssbi@500000 { > + pmicintc: pmic@0 { > + pm8921_gpio: gpio@150 { These should already be labeled in the apq8064 dtsi (or in a qcom-pm8921.dtsi). > + pinctrl-names = "default"; > + pinctrl-0 = <&wlan_default_gpios>; Please move these to the pwrseq node, as that's the consumer of this. > + wlan_default_gpios: wlan-gpios { > + pios { > + pins = "gpio43"; > + function = "normal"; > + bias-disable; > + power-source = <PM8921_GPIO_S4>; > + }; > + }; > + }; > + }; > + }; Regards, Bjorn
On 29/07/15 23:55, Stephen Boyd wrote: > On 07/28/2015 05:53 AM, Srinivas Kandagatla wrote: >> + >> + sdcc4_pwrseq:pwrseq { > > Missing space here between label and node name. > I will fix this in next version. >> + compatible = "mmc-pwrseq-simple"; >> + reset-gpios = <&pm8921_gpio 43 GPIO_ACTIVE_LOW>; >> + }; >> + > > Also this node is not part of the SoC so it should be in the root, > possibly under some sort of power-sequences node so that all the > sequences are grouped in one place. Good spot and suggestion. I will do that in next version. --srini >
diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts index 88d6655..df560cf 100644 --- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts @@ -1,5 +1,6 @@ #include "qcom-apq8064-v2.0.dtsi" #include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> / { model = "Qualcomm APQ8064/IFC6410"; @@ -206,6 +207,28 @@ status = "okay"; }; + qcom,ssbi@500000 { + pmicintc: pmic@0 { + pm8921_gpio: gpio@150 { + pinctrl-names = "default"; + pinctrl-0 = <&wlan_default_gpios>; + wlan_default_gpios: wlan-gpios { + pios { + pins = "gpio43"; + function = "normal"; + bias-disable; + power-source = <PM8921_GPIO_S4>; + }; + }; + }; + }; + }; + + sdcc4_pwrseq:pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&pm8921_gpio 43 GPIO_ACTIVE_LOW>; + }; + amba { /* eMMC */ sdcc1: sdcc@12400000 { @@ -227,6 +250,7 @@ status = "okay"; vmmc-supply = <&ext_3p3v>; vqmmc-supply = <&pm8921_lvs1>; + mmc-pwrseq = <&sdcc4_pwrseq>; }; }; };
This patch adds pwrseq for WLAN which resets the WLAN just before the SDIO bus is up. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> --- arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+)