| Message ID | 1440172400-3333-1-git-send-email-horia.geanta@freescale.com (mailing list archive) |
|---|---|
| State | Accepted |
| Delegated to: | Herbert Xu |
| Headers | show |
On Fri, Aug 21, 2015 at 06:53:20PM +0300, Horia Geant? wrote: > Most significant part of JQCR (Job Queue Control Register) contains > bits that control endianness: ILE - Immediate Little Endian, > DWS - Double Word Swap. > The bits are automatically set by the Job Queue Controller HW. > > Unfortunately these bits are cleared in SW when submitting descriptors > via the register-based service interface. > >From LS1021A: > JQCR_MS = 08080100 - before writing: ILE | DWS | SRC (JR0) > JQCR_MS = 30000100 - after writing: WHL | FOUR | SRC (JR0) > > This would cause problems on little endian caam for descriptors > containing immediata data or double-word pointers. > Currently there is no problem since the only descriptors ran through > this interface are the ones that (un)instantiate RNG. > > Signed-off-by: Horia Geant? <horia.geanta@freescale.com> Applied.
diff --git a/drivers/crypto/caam/ctrl.c b/drivers/crypto/caam/ctrl.c index 81b552d1ad91..09c16f5ea97d 100644 --- a/drivers/crypto/caam/ctrl.c +++ b/drivers/crypto/caam/ctrl.c @@ -139,7 +139,7 @@ static inline int run_descriptor_deco0(struct device *ctrldev, u32 *desc, flags |= DECO_JQCR_FOUR; /* Instruct the DECO to execute it */ - wr_reg32(&deco->jr_ctl_hi, flags); + setbits32(&deco->jr_ctl_hi, flags); timeout = 10000000; do {
Most significant part of JQCR (Job Queue Control Register) contains bits that control endianness: ILE - Immediate Little Endian, DWS - Double Word Swap. The bits are automatically set by the Job Queue Controller HW. Unfortunately these bits are cleared in SW when submitting descriptors via the register-based service interface. From LS1021A: JQCR_MS = 08080100 - before writing: ILE | DWS | SRC (JR0) JQCR_MS = 30000100 - after writing: WHL | FOUR | SRC (JR0) This would cause problems on little endian caam for descriptors containing immediata data or double-word pointers. Currently there is no problem since the only descriptors ran through this interface are the ones that (un)instantiate RNG. Signed-off-by: Horia Geant? <horia.geanta@freescale.com> --- It does not affect current driver, thus not Cc-ing stable. drivers/crypto/caam/ctrl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)