diff mbox

IB/hfi1: Add CSRs for CONFIG_SDMA_VERBOSITY

Message ID 20150902144324.29183.67166.stgit@phlsvslse11.ph.intel.com (mailing list archive)
State Accepted
Headers show

Commit Message

Marciniszyn, Mike Sept. 2, 2015, 2:43 p.m. UTC
From: Jubin John <jubin.john@intel.com>

3 CSRs needed by the CONFIG_SDMA_VERBOSITY code were removed during
the CSR clean up. Adding these CSRs back to resolve 0-day build failure:
https://lists.01.org/pipermail/kbuild-all/2015-August/011919.html

Reviewed-by: Mike Marciniszyn <mike.marciniszyn@intel.com>
Signed-off-by: Jubin John <jubin.john@intel.com>
---
 drivers/staging/rdma/hfi1/chip_registers.h |    3 +++
 drivers/staging/rdma/hfi1/sdma.c           |    4 ++--
 2 files changed, 5 insertions(+), 2 deletions(-)


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Comments

Doug Ledford Sept. 3, 2015, 7:29 p.m. UTC | #1
On 09/02/2015 10:43 AM, Mike Marciniszyn wrote:
> From: Jubin John <jubin.john@intel.com>
> 
> 3 CSRs needed by the CONFIG_SDMA_VERBOSITY code were removed during
> the CSR clean up. Adding these CSRs back to resolve 0-day build failure:
> https://lists.01.org/pipermail/kbuild-all/2015-August/011919.html
> 
> Reviewed-by: Mike Marciniszyn <mike.marciniszyn@intel.com>
> Signed-off-by: Jubin John <jubin.john@intel.com>

Thanks, applied.

> ---
>  drivers/staging/rdma/hfi1/chip_registers.h |    3 +++
>  drivers/staging/rdma/hfi1/sdma.c           |    4 ++--
>  2 files changed, 5 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/staging/rdma/hfi1/chip_registers.h b/drivers/staging/rdma/hfi1/chip_registers.h
> index 6521030..bf45de2 100644
> --- a/drivers/staging/rdma/hfi1/chip_registers.h
> +++ b/drivers/staging/rdma/hfi1/chip_registers.h
> @@ -1285,5 +1285,8 @@
>  #define PCIE_CFG_REG_PL106_GEN3_EQ_PSET_REQ_VEC_SHIFT 8
>  #define PCIE_CFG_REG_PL106_GEN3_EQ_EVAL2MS_DISABLE_SMASK 0x20ull
>  #define PCIE_CFG_REG_PL106_GEN3_EQ_PHASE23_EXIT_MODE_SMASK 0x10ull
> +#define CCE_INT_BLOCKED (CCE + 0x000000110C00)
> +#define SEND_DMA_IDLE_CNT (TXE + 0x000000200040)
> +#define SEND_DMA_DESC_FETCHED_CNT (TXE + 0x000000200058)
>  
>  #endif          /* DEF_CHIP_REG */
> diff --git a/drivers/staging/rdma/hfi1/sdma.c b/drivers/staging/rdma/hfi1/sdma.c
> index 37bd767..a8c903c 100644
> --- a/drivers/staging/rdma/hfi1/sdma.c
> +++ b/drivers/staging/rdma/hfi1/sdma.c
> @@ -1769,7 +1769,7 @@ void sdma_dumpstate(struct sdma_engine *sde)
>  	sdma_dumpstate_helper(SD(ENG_ERR_MASK));
>  
>  	for (i = 0; i < CCE_NUM_INT_CSRS; ++i) {
> -		sdma_dumpstate_helper2(CCE_INT_STATUS));
> +		sdma_dumpstate_helper2(CCE_INT_STATUS);
>  		sdma_dumpstate_helper2(CCE_INT_MASK);
>  		sdma_dumpstate_helper2(CCE_INT_BLOCKED);
>  	}
> @@ -1777,7 +1777,7 @@ void sdma_dumpstate(struct sdma_engine *sde)
>  	sdma_dumpstate_helper(SD(TAIL));
>  	sdma_dumpstate_helper(SD(HEAD));
>  	sdma_dumpstate_helper(SD(PRIORITY_THLD));
> -	sdma_dumpstate_helper(SD(IDLE_CNT);
> +	sdma_dumpstate_helper(SD(IDLE_CNT));
>  	sdma_dumpstate_helper(SD(RELOAD_CNT));
>  	sdma_dumpstate_helper(SD(DESC_CNT));
>  	sdma_dumpstate_helper(SD(DESC_FETCHED_CNT));
> 
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>
diff mbox

Patch

diff --git a/drivers/staging/rdma/hfi1/chip_registers.h b/drivers/staging/rdma/hfi1/chip_registers.h
index 6521030..bf45de2 100644
--- a/drivers/staging/rdma/hfi1/chip_registers.h
+++ b/drivers/staging/rdma/hfi1/chip_registers.h
@@ -1285,5 +1285,8 @@ 
 #define PCIE_CFG_REG_PL106_GEN3_EQ_PSET_REQ_VEC_SHIFT 8
 #define PCIE_CFG_REG_PL106_GEN3_EQ_EVAL2MS_DISABLE_SMASK 0x20ull
 #define PCIE_CFG_REG_PL106_GEN3_EQ_PHASE23_EXIT_MODE_SMASK 0x10ull
+#define CCE_INT_BLOCKED (CCE + 0x000000110C00)
+#define SEND_DMA_IDLE_CNT (TXE + 0x000000200040)
+#define SEND_DMA_DESC_FETCHED_CNT (TXE + 0x000000200058)
 
 #endif          /* DEF_CHIP_REG */
diff --git a/drivers/staging/rdma/hfi1/sdma.c b/drivers/staging/rdma/hfi1/sdma.c
index 37bd767..a8c903c 100644
--- a/drivers/staging/rdma/hfi1/sdma.c
+++ b/drivers/staging/rdma/hfi1/sdma.c
@@ -1769,7 +1769,7 @@  void sdma_dumpstate(struct sdma_engine *sde)
 	sdma_dumpstate_helper(SD(ENG_ERR_MASK));
 
 	for (i = 0; i < CCE_NUM_INT_CSRS; ++i) {
-		sdma_dumpstate_helper2(CCE_INT_STATUS));
+		sdma_dumpstate_helper2(CCE_INT_STATUS);
 		sdma_dumpstate_helper2(CCE_INT_MASK);
 		sdma_dumpstate_helper2(CCE_INT_BLOCKED);
 	}
@@ -1777,7 +1777,7 @@  void sdma_dumpstate(struct sdma_engine *sde)
 	sdma_dumpstate_helper(SD(TAIL));
 	sdma_dumpstate_helper(SD(HEAD));
 	sdma_dumpstate_helper(SD(PRIORITY_THLD));
-	sdma_dumpstate_helper(SD(IDLE_CNT);
+	sdma_dumpstate_helper(SD(IDLE_CNT));
 	sdma_dumpstate_helper(SD(RELOAD_CNT));
 	sdma_dumpstate_helper(SD(DESC_CNT));
 	sdma_dumpstate_helper(SD(DESC_FETCHED_CNT));