diff mbox

drm/i915/guc: Don't forward flip interrupts to GuC

Message ID 1443632257-14309-1-git-send-email-yu.dai@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

yu.dai@intel.com Sept. 30, 2015, 4:57 p.m. UTC 
From: Sagar Arun Kamble <sagar.a.kamble@intel.com>

Due to flip interrupts GuC stays awake always and GT does not enter
RC6. Do not route those interrupts to GuC for now. Driver won't touch
DE_GUCRMR register and leave it as what default value.

Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Signed-off-by: Alex Dai <yu.dai@intel.com>
---
 drivers/gpu/drm/i915/intel_guc_loader.c | 10 ----------
 1 file changed, 10 deletions(-)

Comments

Tom.O'Rourke@intel.com Sept. 30, 2015, 5:16 p.m. UTC | #1 
On Wed, Sep 30, 2015 at 09:57:37AM -0700, yu.dai@intel.com wrote:
> From: Sagar Arun Kamble <sagar.a.kamble@intel.com>
> 
> Due to flip interrupts GuC stays awake always and GT does not enter
> RC6. Do not route those interrupts to GuC for now. Driver won't touch
> DE_GUCRMR register and leave it as what default value.
> 
> Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
> Signed-off-by: Alex Dai <yu.dai@intel.com>
[TOR:] This patch was previously sent.  Still looks good to me.

Reviewed-by: Tom O'Rourke <Tom.O'Rourke@intel.com>

> ---
>  drivers/gpu/drm/i915/intel_guc_loader.c | 10 ----------
>  1 file changed, 10 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c
> index ae85366..934b003 100644
> --- a/drivers/gpu/drm/i915/intel_guc_loader.c
> +++ b/drivers/gpu/drm/i915/intel_guc_loader.c
> @@ -90,9 +90,6 @@ static void direct_interrupts_to_host(struct drm_i915_private *dev_priv)
>  	for_each_ring(ring, dev_priv, i)
>  		I915_WRITE(RING_MODE_GEN7(ring), irqs);
>  
> -	/* tell DE to send nothing to GuC */
> -	I915_WRITE(DE_GUCRMR, ~0);
> -
>  	/* route all GT interrupts to the host */
>  	I915_WRITE(GUC_BCS_RCS_IER, 0);
>  	I915_WRITE(GUC_VCS2_VCS1_IER, 0);
> @@ -110,13 +107,6 @@ static void direct_interrupts_to_guc(struct drm_i915_private *dev_priv)
>  	for_each_ring(ring, dev_priv, i)
>  		I915_WRITE(RING_MODE_GEN7(ring), irqs);
>  
> -	/* tell DE to send (all) flip_done to GuC */
> -	irqs = DERRMR_PIPEA_PRI_FLIP_DONE | DERRMR_PIPEA_SPR_FLIP_DONE |
> -	       DERRMR_PIPEB_PRI_FLIP_DONE | DERRMR_PIPEB_SPR_FLIP_DONE |
> -	       DERRMR_PIPEC_PRI_FLIP_DONE | DERRMR_PIPEC_SPR_FLIP_DONE;
> -	/* Unmasked bits will cause GuC response message to be sent */
> -	I915_WRITE(DE_GUCRMR, ~irqs);
> -
>  	/* route USER_INTERRUPT to Host, all others are sent to GuC. */
>  	irqs = GT_RENDER_USER_INTERRUPT << GEN8_RCS_IRQ_SHIFT |
>  	       GT_RENDER_USER_INTERRUPT << GEN8_BCS_IRQ_SHIFT;
> -- 
> 1.9.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Daniel Vetter Oct. 1, 2015, 8:18 a.m. UTC | #2 
On Wed, Sep 30, 2015 at 10:16:14AM -0700, O'Rourke, Tom wrote:
> On Wed, Sep 30, 2015 at 09:57:37AM -0700, yu.dai@intel.com wrote:
> > From: Sagar Arun Kamble <sagar.a.kamble@intel.com>
> > 
> > Due to flip interrupts GuC stays awake always and GT does not enter
> > RC6. Do not route those interrupts to GuC for now. Driver won't touch
> > DE_GUCRMR register and leave it as what default value.
> > 
> > Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
> > Signed-off-by: Alex Dai <yu.dai@intel.com>
> [TOR:] This patch was previously sent.  Still looks good to me.

Yeah when resending reviewed patches please include the r-b tag to avoid
wasting people's time.
> 
> Reviewed-by: Tom O'Rourke <Tom.O'Rourke@intel.com>

Queued for -next, thanks for the patch.
-Daniel

> 
> > ---
> >  drivers/gpu/drm/i915/intel_guc_loader.c | 10 ----------
> >  1 file changed, 10 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c
> > index ae85366..934b003 100644
> > --- a/drivers/gpu/drm/i915/intel_guc_loader.c
> > +++ b/drivers/gpu/drm/i915/intel_guc_loader.c
> > @@ -90,9 +90,6 @@ static void direct_interrupts_to_host(struct drm_i915_private *dev_priv)
> >  	for_each_ring(ring, dev_priv, i)
> >  		I915_WRITE(RING_MODE_GEN7(ring), irqs);
> >  
> > -	/* tell DE to send nothing to GuC */
> > -	I915_WRITE(DE_GUCRMR, ~0);
> > -
> >  	/* route all GT interrupts to the host */
> >  	I915_WRITE(GUC_BCS_RCS_IER, 0);
> >  	I915_WRITE(GUC_VCS2_VCS1_IER, 0);
> > @@ -110,13 +107,6 @@ static void direct_interrupts_to_guc(struct drm_i915_private *dev_priv)
> >  	for_each_ring(ring, dev_priv, i)
> >  		I915_WRITE(RING_MODE_GEN7(ring), irqs);
> >  
> > -	/* tell DE to send (all) flip_done to GuC */
> > -	irqs = DERRMR_PIPEA_PRI_FLIP_DONE | DERRMR_PIPEA_SPR_FLIP_DONE |
> > -	       DERRMR_PIPEB_PRI_FLIP_DONE | DERRMR_PIPEB_SPR_FLIP_DONE |
> > -	       DERRMR_PIPEC_PRI_FLIP_DONE | DERRMR_PIPEC_SPR_FLIP_DONE;
> > -	/* Unmasked bits will cause GuC response message to be sent */
> > -	I915_WRITE(DE_GUCRMR, ~irqs);
> > -
> >  	/* route USER_INTERRUPT to Host, all others are sent to GuC. */
> >  	irqs = GT_RENDER_USER_INTERRUPT << GEN8_RCS_IRQ_SHIFT |
> >  	       GT_RENDER_USER_INTERRUPT << GEN8_BCS_IRQ_SHIFT;
> > -- 
> > 1.9.1
> > 
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Jani Nikula Oct. 1, 2015, 8:52 a.m. UTC | #3 
On Thu, 01 Oct 2015, Daniel Vetter <daniel@ffwll.ch> wrote:
> On Wed, Sep 30, 2015 at 10:16:14AM -0700, O'Rourke, Tom wrote:
>> On Wed, Sep 30, 2015 at 09:57:37AM -0700, yu.dai@intel.com wrote:
>> > From: Sagar Arun Kamble <sagar.a.kamble@intel.com>
>> > 
>> > Due to flip interrupts GuC stays awake always and GT does not enter
>> > RC6. Do not route those interrupts to GuC for now. Driver won't touch
>> > DE_GUCRMR register and leave it as what default value.
>> > 
>> > Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
>> > Signed-off-by: Alex Dai <yu.dai@intel.com>
>> [TOR:] This patch was previously sent.  Still looks good to me.
>
> Yeah when resending reviewed patches please include the r-b tag to avoid
> wasting people's time.
>> 
>> Reviewed-by: Tom O'Rourke <Tom.O'Rourke@intel.com>
>
> Queued for -next, thanks for the patch.

Hmm, what's the impact on skl rc6 in v4.3?

BR,
Jani.



> -Daniel
>
>> 
>> > ---
>> >  drivers/gpu/drm/i915/intel_guc_loader.c | 10 ----------
>> >  1 file changed, 10 deletions(-)
>> > 
>> > diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c
>> > index ae85366..934b003 100644
>> > --- a/drivers/gpu/drm/i915/intel_guc_loader.c
>> > +++ b/drivers/gpu/drm/i915/intel_guc_loader.c
>> > @@ -90,9 +90,6 @@ static void direct_interrupts_to_host(struct drm_i915_private *dev_priv)
>> >  	for_each_ring(ring, dev_priv, i)
>> >  		I915_WRITE(RING_MODE_GEN7(ring), irqs);
>> >  
>> > -	/* tell DE to send nothing to GuC */
>> > -	I915_WRITE(DE_GUCRMR, ~0);
>> > -
>> >  	/* route all GT interrupts to the host */
>> >  	I915_WRITE(GUC_BCS_RCS_IER, 0);
>> >  	I915_WRITE(GUC_VCS2_VCS1_IER, 0);
>> > @@ -110,13 +107,6 @@ static void direct_interrupts_to_guc(struct drm_i915_private *dev_priv)
>> >  	for_each_ring(ring, dev_priv, i)
>> >  		I915_WRITE(RING_MODE_GEN7(ring), irqs);
>> >  
>> > -	/* tell DE to send (all) flip_done to GuC */
>> > -	irqs = DERRMR_PIPEA_PRI_FLIP_DONE | DERRMR_PIPEA_SPR_FLIP_DONE |
>> > -	       DERRMR_PIPEB_PRI_FLIP_DONE | DERRMR_PIPEB_SPR_FLIP_DONE |
>> > -	       DERRMR_PIPEC_PRI_FLIP_DONE | DERRMR_PIPEC_SPR_FLIP_DONE;
>> > -	/* Unmasked bits will cause GuC response message to be sent */
>> > -	I915_WRITE(DE_GUCRMR, ~irqs);
>> > -
>> >  	/* route USER_INTERRUPT to Host, all others are sent to GuC. */
>> >  	irqs = GT_RENDER_USER_INTERRUPT << GEN8_RCS_IRQ_SHIFT |
>> >  	       GT_RENDER_USER_INTERRUPT << GEN8_BCS_IRQ_SHIFT;
>> > -- 
>> > 1.9.1
>> > 
>> > _______________________________________________
>> > Intel-gfx mailing list
>> > Intel-gfx@lists.freedesktop.org
>> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
> -- 
> Daniel Vetter
> Software Engineer, Intel Corporation
> http://blog.ffwll.ch
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Daniel Vetter Oct. 1, 2015, 9:30 a.m. UTC | #4 
On Thu, Oct 01, 2015 at 11:52:36AM +0300, Jani Nikula wrote:
> On Thu, 01 Oct 2015, Daniel Vetter <daniel@ffwll.ch> wrote:
> > On Wed, Sep 30, 2015 at 10:16:14AM -0700, O'Rourke, Tom wrote:
> >> On Wed, Sep 30, 2015 at 09:57:37AM -0700, yu.dai@intel.com wrote:
> >> > From: Sagar Arun Kamble <sagar.a.kamble@intel.com>
> >> > 
> >> > Due to flip interrupts GuC stays awake always and GT does not enter
> >> > RC6. Do not route those interrupts to GuC for now. Driver won't touch
> >> > DE_GUCRMR register and leave it as what default value.
> >> > 
> >> > Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
> >> > Signed-off-by: Alex Dai <yu.dai@intel.com>
> >> [TOR:] This patch was previously sent.  Still looks good to me.
> >
> > Yeah when resending reviewed patches please include the r-b tag to avoid
> > wasting people's time.
> >> 
> >> Reviewed-by: Tom O'Rourke <Tom.O'Rourke@intel.com>
> >
> > Queued for -next, thanks for the patch.
> 
> Hmm, what's the impact on skl rc6 in v4.3?

guc isn't enabled yet anywhere by default. Impact is none. Yup commit
message should probably mention that ...
-Daniel
> 
> BR,
> Jani.
> 
> 
> 
> > -Daniel
> >
> >> 
> >> > ---
> >> >  drivers/gpu/drm/i915/intel_guc_loader.c | 10 ----------
> >> >  1 file changed, 10 deletions(-)
> >> > 
> >> > diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c
> >> > index ae85366..934b003 100644
> >> > --- a/drivers/gpu/drm/i915/intel_guc_loader.c
> >> > +++ b/drivers/gpu/drm/i915/intel_guc_loader.c
> >> > @@ -90,9 +90,6 @@ static void direct_interrupts_to_host(struct drm_i915_private *dev_priv)
> >> >  	for_each_ring(ring, dev_priv, i)
> >> >  		I915_WRITE(RING_MODE_GEN7(ring), irqs);
> >> >  
> >> > -	/* tell DE to send nothing to GuC */
> >> > -	I915_WRITE(DE_GUCRMR, ~0);
> >> > -
> >> >  	/* route all GT interrupts to the host */
> >> >  	I915_WRITE(GUC_BCS_RCS_IER, 0);
> >> >  	I915_WRITE(GUC_VCS2_VCS1_IER, 0);
> >> > @@ -110,13 +107,6 @@ static void direct_interrupts_to_guc(struct drm_i915_private *dev_priv)
> >> >  	for_each_ring(ring, dev_priv, i)
> >> >  		I915_WRITE(RING_MODE_GEN7(ring), irqs);
> >> >  
> >> > -	/* tell DE to send (all) flip_done to GuC */
> >> > -	irqs = DERRMR_PIPEA_PRI_FLIP_DONE | DERRMR_PIPEA_SPR_FLIP_DONE |
> >> > -	       DERRMR_PIPEB_PRI_FLIP_DONE | DERRMR_PIPEB_SPR_FLIP_DONE |
> >> > -	       DERRMR_PIPEC_PRI_FLIP_DONE | DERRMR_PIPEC_SPR_FLIP_DONE;
> >> > -	/* Unmasked bits will cause GuC response message to be sent */
> >> > -	I915_WRITE(DE_GUCRMR, ~irqs);
> >> > -
> >> >  	/* route USER_INTERRUPT to Host, all others are sent to GuC. */
> >> >  	irqs = GT_RENDER_USER_INTERRUPT << GEN8_RCS_IRQ_SHIFT |
> >> >  	       GT_RENDER_USER_INTERRUPT << GEN8_BCS_IRQ_SHIFT;
> >> > -- 
> >> > 1.9.1
> >> > 
> >> > _______________________________________________
> >> > Intel-gfx mailing list
> >> > Intel-gfx@lists.freedesktop.org
> >> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> >> _______________________________________________
> >> Intel-gfx mailing list
> >> Intel-gfx@lists.freedesktop.org
> >> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> >
> > -- 
> > Daniel Vetter
> > Software Engineer, Intel Corporation
> > http://blog.ffwll.ch
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> -- 
> Jani Nikula, Intel Open Source Technology Center
sagar.a.kamble@intel.com Oct. 1, 2015, 9:51 a.m. UTC | #5 
On 10/1/2015 2:22 PM, Jani Nikula wrote:
> On Thu, 01 Oct 2015, Daniel Vetter <daniel@ffwll.ch> wrote:
>> On Wed, Sep 30, 2015 at 10:16:14AM -0700, O'Rourke, Tom wrote:
>>> On Wed, Sep 30, 2015 at 09:57:37AM -0700, yu.dai@intel.com wrote:
>>>> From: Sagar Arun Kamble <sagar.a.kamble@intel.com>
>>>>
>>>> Due to flip interrupts GuC stays awake always and GT does not enter
>>>> RC6. Do not route those interrupts to GuC for now. Driver won't touch
>>>> DE_GUCRMR register and leave it as what default value.
>>>>
>>>> Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
>>>> Signed-off-by: Alex Dai <yu.dai@intel.com>
>>> [TOR:] This patch was previously sent.  Still looks good to me.
>> Yeah when resending reviewed patches please include the r-b tag to avoid
>> wasting people's time.
>>> Reviewed-by: Tom O'Rourke <Tom.O'Rourke@intel.com>
>> Queued for -next, thanks for the patch.
> Hmm, what's the impact on skl rc6 in v4.3?
This change was prepared with v4.3 firmware.
Even with GuC v4.3 firmware, SKL RC6 does not work if flip interrupts 
are routed to GuC.
>
> BR,
> Jani.
>
>
>
>> -Daniel
>>
>>>> ---
>>>>   drivers/gpu/drm/i915/intel_guc_loader.c | 10 ----------
>>>>   1 file changed, 10 deletions(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c
>>>> index ae85366..934b003 100644
>>>> --- a/drivers/gpu/drm/i915/intel_guc_loader.c
>>>> +++ b/drivers/gpu/drm/i915/intel_guc_loader.c
>>>> @@ -90,9 +90,6 @@ static void direct_interrupts_to_host(struct drm_i915_private *dev_priv)
>>>>   	for_each_ring(ring, dev_priv, i)
>>>>   		I915_WRITE(RING_MODE_GEN7(ring), irqs);
>>>>   
>>>> -	/* tell DE to send nothing to GuC */
>>>> -	I915_WRITE(DE_GUCRMR, ~0);
>>>> -
>>>>   	/* route all GT interrupts to the host */
>>>>   	I915_WRITE(GUC_BCS_RCS_IER, 0);
>>>>   	I915_WRITE(GUC_VCS2_VCS1_IER, 0);
>>>> @@ -110,13 +107,6 @@ static void direct_interrupts_to_guc(struct drm_i915_private *dev_priv)
>>>>   	for_each_ring(ring, dev_priv, i)
>>>>   		I915_WRITE(RING_MODE_GEN7(ring), irqs);
>>>>   
>>>> -	/* tell DE to send (all) flip_done to GuC */
>>>> -	irqs = DERRMR_PIPEA_PRI_FLIP_DONE | DERRMR_PIPEA_SPR_FLIP_DONE |
>>>> -	       DERRMR_PIPEB_PRI_FLIP_DONE | DERRMR_PIPEB_SPR_FLIP_DONE |
>>>> -	       DERRMR_PIPEC_PRI_FLIP_DONE | DERRMR_PIPEC_SPR_FLIP_DONE;
>>>> -	/* Unmasked bits will cause GuC response message to be sent */
>>>> -	I915_WRITE(DE_GUCRMR, ~irqs);
>>>> -
>>>>   	/* route USER_INTERRUPT to Host, all others are sent to GuC. */
>>>>   	irqs = GT_RENDER_USER_INTERRUPT << GEN8_RCS_IRQ_SHIFT |
>>>>   	       GT_RENDER_USER_INTERRUPT << GEN8_BCS_IRQ_SHIFT;
>>>> -- 
>>>> 1.9.1
>>>>
>>>> _______________________________________________
>>>> Intel-gfx mailing list
>>>> Intel-gfx@lists.freedesktop.org
>>>> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>>> _______________________________________________
>>> Intel-gfx mailing list
>>> Intel-gfx@lists.freedesktop.org
>>> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>> -- 
>> Daniel Vetter
>> Software Engineer, Intel Corporation
>> http://blog.ffwll.ch
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c
index ae85366..934b003 100644
--- a/drivers/gpu/drm/i915/intel_guc_loader.c
+++ b/drivers/gpu/drm/i915/intel_guc_loader.c
@@ -90,9 +90,6 @@  static void direct_interrupts_to_host(struct drm_i915_private *dev_priv)
 	for_each_ring(ring, dev_priv, i)
 		I915_WRITE(RING_MODE_GEN7(ring), irqs);
 
-	/* tell DE to send nothing to GuC */
-	I915_WRITE(DE_GUCRMR, ~0);
-
 	/* route all GT interrupts to the host */
 	I915_WRITE(GUC_BCS_RCS_IER, 0);
 	I915_WRITE(GUC_VCS2_VCS1_IER, 0);
@@ -110,13 +107,6 @@  static void direct_interrupts_to_guc(struct drm_i915_private *dev_priv)
 	for_each_ring(ring, dev_priv, i)
 		I915_WRITE(RING_MODE_GEN7(ring), irqs);
 
-	/* tell DE to send (all) flip_done to GuC */
-	irqs = DERRMR_PIPEA_PRI_FLIP_DONE | DERRMR_PIPEA_SPR_FLIP_DONE |
-	       DERRMR_PIPEB_PRI_FLIP_DONE | DERRMR_PIPEB_SPR_FLIP_DONE |
-	       DERRMR_PIPEC_PRI_FLIP_DONE | DERRMR_PIPEC_SPR_FLIP_DONE;
-	/* Unmasked bits will cause GuC response message to be sent */
-	I915_WRITE(DE_GUCRMR, ~irqs);
-
 	/* route USER_INTERRUPT to Host, all others are sent to GuC. */
 	irqs = GT_RENDER_USER_INTERRUPT << GEN8_RCS_IRQ_SHIFT |
 	       GT_RENDER_USER_INTERRUPT << GEN8_BCS_IRQ_SHIFT;