[GIT,PULL] clk/samsung updates for v4.4

Commit Message

Stephen Boyd Oct. 2, 2015, 6:37 p.m. UTC

On 10/02, Sylwester Nawrocki wrote:
> 
> The following changes since commit 6ff33f3902c3b1c5d0db6b1e2c70b6d76fba357f:
> 
>   Linux 4.3-rc1 (2015-09-12 16:35:56 -0700)
> 
> are available in the git repository at:
> 
>   git://linuxtv.org/snawrocki/samsung.git tags/clk-samsung-4.4
> 
> for you to fetch changes up to 7993b3ebec979b23c2d7425959c9d232c452498b:
> 
>   clk: samsung: exynos7: Add required clock tree for UFS (2015-09-15 11:18:15 +0200)
> 

Thanks, pulled. I put this patch on top though.

-----8<-----
From: Stephen Boyd <[e-mail]>
Subject: [PATCH] clk: samsung: exynos7: Staticize file scope symbols

drivers/clk/samsung/clk-exynos7.c:896:33:
warning: symbol 'fixed_rate_clks_fsys0' was not declared. Should
it be static?
drivers/clk/samsung/clk-exynos7.c:1010:33:
warning: symbol 'fixed_rate_clks_fsys1' was not declared. Should
it be static?

Cc: Sylwester Nawrocki <[e-mail]>
Signed-off-by: Stephen Boyd <[e-mail]>
---
 drivers/clk/samsung/clk-exynos7.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Sylwester Nawrocki/Kernel \(PLT\) /SRPOL/Staff Engineer/Samsung Electronics Oct. 6, 2015, 10:18 a.m. UTC | #1

On 02/10/15 20:37, Stephen Boyd wrote:
> On 10/02, Sylwester Nawrocki wrote:
...
> Thanks, pulled. I put this patch on top though.

Thanks for taking care of this, I'll make sure such issues
are fixed before sending any future pull requests.

--
Regards,
Sylwester
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Patch

diff --git a/drivers/clk/samsung/clk-exynos7.c b/drivers/clk/samsung/clk-exynos7.c
index 924215b219da..55f8e2e24ab8 100644
--- a/drivers/clk/samsung/clk-exynos7.c
+++ b/drivers/clk/samsung/clk-exynos7.c
@@ -893,7 +893,7 @@  PNAME(mout_phyclk_usbdrd300_udrd30_pipe_pclk_user_p)	= { "fin_pll",
 				"phyclk_usbdrd300_udrd30_pipe_pclk" };
 
 /* fixed rate clocks used in the FSYS0 block */
-struct samsung_fixed_rate_clock fixed_rate_clks_fsys0[] __initdata = {
+static struct samsung_fixed_rate_clock fixed_rate_clks_fsys0[] __initdata = {
 	FRATE(0, "phyclk_usbdrd300_udrd30_phyclock", NULL,
 		CLK_IS_ROOT, 60000000),
 	FRATE(0, "phyclk_usbdrd300_udrd30_pipe_pclk", NULL,
@@ -1007,7 +1007,7 @@  PNAME(mout_phyclk_ufs20_rx0_user_p) = { "fin_pll", "phyclk_ufs20_rx0_symbol" };
 PNAME(mout_phyclk_ufs20_rx1_user_p) = { "fin_pll", "phyclk_ufs20_rx1_symbol" };
 
 /* fixed rate clocks used in the FSYS1 block */
-struct samsung_fixed_rate_clock fixed_rate_clks_fsys1[] __initdata = {
+static struct samsung_fixed_rate_clock fixed_rate_clks_fsys1[] __initdata = {
 	FRATE(PHYCLK_UFS20_TX0_SYMBOL, "phyclk_ufs20_tx0_symbol", NULL,
 			CLK_IS_ROOT, 300000000),
 	FRATE(PHYCLK_UFS20_RX0_SYMBOL, "phyclk_ufs20_rx0_symbol", NULL,