| Message ID | 1443022487-6259-1-git-send-email-gabriel.feceoru@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Op 23-09-15 om 17:34 schreef Gabriel Feceoru: > Using 2 connectors (DVI and VGA) will cause wrpll to be set for > INTEL_OUTPUT_HDMI but never reset if switching to INTEL_OUTPUT_VGA > > Supresses errors like these: > [drm:intel_pipe_config_compare [i915]] *ERROR* mismatch in dpll_hw_state.wrpll > Looks like a good idea to always zero it. Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
On Tue, Oct 13, 2015 at 03:18:16PM +0200, Maarten Lankhorst wrote: > Op 23-09-15 om 17:34 schreef Gabriel Feceoru: > > Using 2 connectors (DVI and VGA) will cause wrpll to be set for > > INTEL_OUTPUT_HDMI but never reset if switching to INTEL_OUTPUT_VGA > > > > Supresses errors like these: > > [drm:intel_pipe_config_compare [i915]] *ERROR* mismatch in dpll_hw_state.wrpll > > > Looks like a good idea to always zero it. Except that we still have a bunch of cases where we recompute clock state but only partially. Can we just move them all up into a common place please? That would also catch cases where we simply forget to fill this out at all. One case I noticed is edp in skl_ddi_pll_select, but there's probably more. -Daniel > > Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
On Tue, Oct 13, 2015 at 03:35:01PM +0200, Daniel Vetter wrote: > On Tue, Oct 13, 2015 at 03:18:16PM +0200, Maarten Lankhorst wrote: > > Op 23-09-15 om 17:34 schreef Gabriel Feceoru: > > > Using 2 connectors (DVI and VGA) will cause wrpll to be set for > > > INTEL_OUTPUT_HDMI but never reset if switching to INTEL_OUTPUT_VGA > > > > > > Supresses errors like these: > > > [drm:intel_pipe_config_compare [i915]] *ERROR* mismatch in dpll_hw_state.wrpll > > > > > Looks like a good idea to always zero it. > > Except that we still have a bunch of cases where we recompute clock state > but only partially. Can we just move them all up into a common place > please? That would also catch cases where we simply forget to fill this > out at all. > > One case I noticed is edp in skl_ddi_pll_select, but there's probably > more. Specifically I think we should move the memset into intel_modeset_pipe_config and remove it from all the clock compute/pll select functions. Last time we wanted to do that it wasn't yet possible because the atomice modeset conversion and shared dpll tracking needed the old values, but that should be fixed now with crtc_state structures being completely free-standing. -Daniel
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index 4823184..1e5001a 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -1245,6 +1245,9 @@ hsw_ddi_pll_select(struct intel_crtc *intel_crtc, { int clock = crtc_state->port_clock; + memset(&crtc_state->dpll_hw_state, 0, + sizeof(crtc_state->dpll_hw_state)); + if (intel_encoder->type == INTEL_OUTPUT_HDMI) { struct intel_shared_dpll *pll; uint32_t val; @@ -1256,9 +1259,6 @@ hsw_ddi_pll_select(struct intel_crtc *intel_crtc, WRPLL_DIVIDER_REFERENCE(r2) | WRPLL_DIVIDER_FEEDBACK(n2) | WRPLL_DIVIDER_POST(p); - memset(&crtc_state->dpll_hw_state, 0, - sizeof(crtc_state->dpll_hw_state)); - crtc_state->dpll_hw_state.wrpll = val; pll = intel_get_shared_dpll(intel_crtc, crtc_state);
Using 2 connectors (DVI and VGA) will cause wrpll to be set for INTEL_OUTPUT_HDMI but never reset if switching to INTEL_OUTPUT_VGA Supresses errors like these: [drm:intel_pipe_config_compare [i915]] *ERROR* mismatch in dpll_hw_state.wrpll Signed-off-by: Gabriel Feceoru <gabriel.feceoru@intel.com> --- drivers/gpu/drm/i915/intel_ddi.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)