| Message ID | E1Ztcw9-0007Cz-TX@rmk-PC.arm.linux.org.uk (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Tue, Nov 3, 2015 at 3:51 PM, Russell King <rmk+kernel@arm.linux.org.uk> wrote: > Add (incomplete) support for the ZTE UART to the AMBA PL011 driver. > This is similar to the ARM and ST variants, except it has a different > register address layout, and requires 32-bit accesses to the registers. > Use the newly introduced register tables and access size support to > cope with these differences. > > Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> I applied the whole series, 1-11 and tested on Ux500 (ST Micro variant) and on the ARM RealView PB11MPCore. It works like a charm. I also like the looks of this transformation. Tested-by: Linus Walleij <linus.walleij@linaro.org> Yours, Linus Walleij
On Thu, Nov 05, 2015 at 09:28:23AM +0100, Linus Walleij wrote: > On Tue, Nov 3, 2015 at 3:51 PM, Russell King > <rmk+kernel@arm.linux.org.uk> wrote: > > > Add (incomplete) support for the ZTE UART to the AMBA PL011 driver. > > This is similar to the ARM and ST variants, except it has a different > > register address layout, and requires 32-bit accesses to the registers. > > Use the newly introduced register tables and access size support to > > cope with these differences. > > > > Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> > > I applied the whole series, 1-11 and tested on Ux500 (ST Micro variant) > and on the ARM RealView PB11MPCore. > > It works like a charm. I also like the looks of this transformation. > Tested-by: Linus Walleij <linus.walleij@linaro.org> As I mentioned, the change in pl011_putc() needs undoing (I've already modified that in my series). Also, I'll try switching to the relaxed accessors and checking that. Thanks for the tested-by though, can I assume that you're happy I add that even with the pl011_putc() change undone?
On Thu, Nov 5, 2015 at 10:27 AM, Russell King - ARM Linux <linux@arm.linux.org.uk> wrote: > On Thu, Nov 05, 2015 at 09:28:23AM +0100, Linus Walleij wrote: >> On Tue, Nov 3, 2015 at 3:51 PM, Russell King >> <rmk+kernel@arm.linux.org.uk> wrote: >> >> > Add (incomplete) support for the ZTE UART to the AMBA PL011 driver. >> > This is similar to the ARM and ST variants, except it has a different >> > register address layout, and requires 32-bit accesses to the registers. >> > Use the newly introduced register tables and access size support to >> > cope with these differences. >> > >> > Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> >> >> I applied the whole series, 1-11 and tested on Ux500 (ST Micro variant) >> and on the ARM RealView PB11MPCore. >> >> It works like a charm. I also like the looks of this transformation. >> Tested-by: Linus Walleij <linus.walleij@linaro.org> > > As I mentioned, the change in pl011_putc() needs undoing (I've already > modified that in my series). Also, I'll try switching to the relaxed > accessors and checking that. Thanks for the tested-by though, can I > assume that you're happy I add that even with the pl011_putc() change > undone? Sure. I'm pretty sure that doesn't change much. Yours, Linus Walleij
diff --git a/drivers/tty/serial/amba-pl011.c b/drivers/tty/serial/amba-pl011.c index 8f5f82039346..373b1520083f 100644 --- a/drivers/tty/serial/amba-pl011.c +++ b/drivers/tty/serial/amba-pl011.c @@ -171,6 +171,29 @@ static struct vendor_data vendor_st = { .get_fifosize = get_fifosize_st, }; +static const u16 pl011_zte_offsets[REG_ARRAY_SIZE] = { + [REG_DR] = ZX_UART011_DR, + [REG_FR] = ZX_UART011_FR, + [REG_LCRH_RX] = ZX_UART011_LCRH, + [REG_LCRH_TX] = ZX_UART011_LCRH, + [REG_IBRD] = ZX_UART011_IBRD, + [REG_FBRD] = ZX_UART011_FBRD, + [REG_CR] = ZX_UART011_CR, + [REG_IFLS] = ZX_UART011_IFLS, + [REG_IMSC] = ZX_UART011_IMSC, + [REG_RIS] = ZX_UART011_RIS, + [REG_MIS] = ZX_UART011_MIS, + [REG_ICR] = ZX_UART011_ICR, + [REG_DMACR] = ZX_UART011_DMACR, +}; + +static struct vendor_data vendor_zte = { + .reg_offset = pl011_zte_offsets, + .access_32b = true, + .ifls = UART011_IFLS_RX4_8|UART011_IFLS_TX4_8, + .get_fifosize = get_fifosize_arm, +}; + /* Deals with DMA transactions */ struct pl011_sgbuf { diff --git a/include/linux/amba/serial.h b/include/linux/amba/serial.h index 0ddb5c02ad8b..d76a19ba2cff 100644 --- a/include/linux/amba/serial.h +++ b/include/linux/amba/serial.h @@ -65,6 +65,24 @@ #define ST_UART011_ABCR 0x100 /* Autobaud control register. */ #define ST_UART011_ABIMSC 0x15C /* Autobaud interrupt mask/clear register. */ +/* + * ZTE UART register offsets. This UART has a radically different address + * allocation from the ARM and ST variants, so we list all registers here. + * We assume unlisted registers do not exist. + */ +#define ZX_UART011_DR 0x04 +#define ZX_UART011_FR 0x14 +#define ZX_UART011_IBRD 0x24 +#define ZX_UART011_FBRD 0x28 +#define ZX_UART011_LCRH 0x30 +#define ZX_UART011_CR 0x34 +#define ZX_UART011_IFLS 0x38 +#define ZX_UART011_IMSC 0x40 +#define ZX_UART011_RIS 0x44 +#define ZX_UART011_MIS 0x48 +#define ZX_UART011_ICR 0x4c +#define ZX_UART011_DMACR 0x50 + #define UART011_DR_OE (1 << 11) #define UART011_DR_BE (1 << 10) #define UART011_DR_PE (1 << 9)
Add (incomplete) support for the ZTE UART to the AMBA PL011 driver. This is similar to the ARM and ST variants, except it has a different register address layout, and requires 32-bit accesses to the registers. Use the newly introduced register tables and access size support to cope with these differences. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> --- drivers/tty/serial/amba-pl011.c | 23 +++++++++++++++++++++++ include/linux/amba/serial.h | 18 ++++++++++++++++++ 2 files changed, 41 insertions(+)