| Message ID | 1447705088-2395-2-git-send-email-m.deepak@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Mon, 16 Nov 2015, Deepak M <m.deepak@intel.com> wrote: > For dual link panel scenarios there are new fileds added in the > VBT which indicate on which port the PWM cntrl and CABC ON/OFF > commands needs to be sent. > > Cc: Jani Nikula <jani.nikula@intel.com> > Cc: Daniel Vetter <daniel.vetter@intel.com> > Cc: Yetunde Adebisi <yetundex.adebisi@intel.com> > Signed-off-by: Deepak M <m.deepak@intel.com> > --- > drivers/gpu/drm/i915/intel_bios.c | 13 +++++++++++++ > drivers/gpu/drm/i915/intel_bios.h | 5 ++++- > drivers/gpu/drm/i915/intel_dsi.h | 2 ++ > 3 files changed, 19 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c > index ce82f9c..2ef8721 100644 > --- a/drivers/gpu/drm/i915/intel_bios.c > +++ b/drivers/gpu/drm/i915/intel_bios.c > @@ -793,6 +793,19 @@ parse_mipi(struct drm_i915_private *dev_priv, const struct bdb_header *bdb) > return; > } > > + /* > + * These below bits will inform us on which port the panel blk_cntrl and > + * CABC ON/OFF commands needs to be sent in case of dual link panels > + * u16 dl_cabc_port:2; > + * u16 pwm_bkl_ctrl:2; > + * But these are introduced from the VBT version 197 onwards, so making > + * sure that these bits are zero in the pervious versions. > + */ > + if (dev_priv->vbt.dsi.config->dual_link && bdb->version < 197) { > + dev_priv->vbt.dsi.config->dl_cabc_port = 0; > + dev_priv->vbt.dsi.config->pwm_bkl_ctrl = 0; > + } > + dev_priv->vbt is zero by default, so none of the above is needed. > /* We have mandatory mipi config blocks. Initialize as generic panel */ > dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID; > > diff --git a/drivers/gpu/drm/i915/intel_bios.h b/drivers/gpu/drm/i915/intel_bios.h > index 7ec8c9a..9283969 100644 > --- a/drivers/gpu/drm/i915/intel_bios.h > +++ b/drivers/gpu/drm/i915/intel_bios.h > @@ -832,7 +832,10 @@ struct mipi_config { > u16 dual_link:2; > u16 lane_cnt:2; > u16 pixel_overlap:3; > - u16 rsvd3:9; > + u16 rgb_flip:1; > + u16 dl_cabc_port:2; > + u16 pwm_bkl_ctrl:2; > + u16 rsvd3:4; > > u16 rsvd4; > > diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h > index e6cb252..4fde83b 100644 > --- a/drivers/gpu/drm/i915/intel_dsi.h > +++ b/drivers/gpu/drm/i915/intel_dsi.h > @@ -74,6 +74,8 @@ struct intel_dsi { > > u8 escape_clk_div; > u8 dual_link; > + u8 bkl_dcs_ports; > + u8 pwm_blk_ctrl; This is a much more natural place to explain what these things do. > u8 pixel_overlap; > u32 port_bits; > u32 bw_timer;
On Wed, 25 Nov 2015, Jani Nikula <jani.nikula@intel.com> wrote: > On Mon, 16 Nov 2015, Deepak M <m.deepak@intel.com> wrote: >> For dual link panel scenarios there are new fileds added in the >> VBT which indicate on which port the PWM cntrl and CABC ON/OFF >> commands needs to be sent. >> >> Cc: Jani Nikula <jani.nikula@intel.com> >> Cc: Daniel Vetter <daniel.vetter@intel.com> >> Cc: Yetunde Adebisi <yetundex.adebisi@intel.com> >> Signed-off-by: Deepak M <m.deepak@intel.com> >> --- >> drivers/gpu/drm/i915/intel_bios.c | 13 +++++++++++++ >> drivers/gpu/drm/i915/intel_bios.h | 5 ++++- >> drivers/gpu/drm/i915/intel_dsi.h | 2 ++ >> 3 files changed, 19 insertions(+), 1 deletion(-) >> >> diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c >> index ce82f9c..2ef8721 100644 >> --- a/drivers/gpu/drm/i915/intel_bios.c >> +++ b/drivers/gpu/drm/i915/intel_bios.c >> @@ -793,6 +793,19 @@ parse_mipi(struct drm_i915_private *dev_priv, const struct bdb_header *bdb) >> return; >> } >> >> + /* >> + * These below bits will inform us on which port the panel blk_cntrl and >> + * CABC ON/OFF commands needs to be sent in case of dual link panels >> + * u16 dl_cabc_port:2; >> + * u16 pwm_bkl_ctrl:2; >> + * But these are introduced from the VBT version 197 onwards, so making >> + * sure that these bits are zero in the pervious versions. >> + */ >> + if (dev_priv->vbt.dsi.config->dual_link && bdb->version < 197) { >> + dev_priv->vbt.dsi.config->dl_cabc_port = 0; >> + dev_priv->vbt.dsi.config->pwm_bkl_ctrl = 0; >> + } >> + > > dev_priv->vbt is zero by default, so none of the above is needed. Ugh, I didn't realize we just copy the dsi.config verbatim from VBT. Maybe we do want this after all. > >> /* We have mandatory mipi config blocks. Initialize as generic panel */ >> dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID; >> >> diff --git a/drivers/gpu/drm/i915/intel_bios.h b/drivers/gpu/drm/i915/intel_bios.h >> index 7ec8c9a..9283969 100644 >> --- a/drivers/gpu/drm/i915/intel_bios.h >> +++ b/drivers/gpu/drm/i915/intel_bios.h >> @@ -832,7 +832,10 @@ struct mipi_config { >> u16 dual_link:2; >> u16 lane_cnt:2; >> u16 pixel_overlap:3; >> - u16 rsvd3:9; >> + u16 rgb_flip:1; >> + u16 dl_cabc_port:2; >> + u16 pwm_bkl_ctrl:2; >> + u16 rsvd3:4; >> >> u16 rsvd4; >> >> diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h >> index e6cb252..4fde83b 100644 >> --- a/drivers/gpu/drm/i915/intel_dsi.h >> +++ b/drivers/gpu/drm/i915/intel_dsi.h >> @@ -74,6 +74,8 @@ struct intel_dsi { >> >> u8 escape_clk_div; >> u8 dual_link; >> + u8 bkl_dcs_ports; >> + u8 pwm_blk_ctrl; > > This is a much more natural place to explain what these things do. > >> u8 pixel_overlap; >> u32 port_bits; >> u32 bw_timer;
diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c index ce82f9c..2ef8721 100644 --- a/drivers/gpu/drm/i915/intel_bios.c +++ b/drivers/gpu/drm/i915/intel_bios.c @@ -793,6 +793,19 @@ parse_mipi(struct drm_i915_private *dev_priv, const struct bdb_header *bdb) return; } + /* + * These below bits will inform us on which port the panel blk_cntrl and + * CABC ON/OFF commands needs to be sent in case of dual link panels + * u16 dl_cabc_port:2; + * u16 pwm_bkl_ctrl:2; + * But these are introduced from the VBT version 197 onwards, so making + * sure that these bits are zero in the pervious versions. + */ + if (dev_priv->vbt.dsi.config->dual_link && bdb->version < 197) { + dev_priv->vbt.dsi.config->dl_cabc_port = 0; + dev_priv->vbt.dsi.config->pwm_bkl_ctrl = 0; + } + /* We have mandatory mipi config blocks. Initialize as generic panel */ dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID; diff --git a/drivers/gpu/drm/i915/intel_bios.h b/drivers/gpu/drm/i915/intel_bios.h index 7ec8c9a..9283969 100644 --- a/drivers/gpu/drm/i915/intel_bios.h +++ b/drivers/gpu/drm/i915/intel_bios.h @@ -832,7 +832,10 @@ struct mipi_config { u16 dual_link:2; u16 lane_cnt:2; u16 pixel_overlap:3; - u16 rsvd3:9; + u16 rgb_flip:1; + u16 dl_cabc_port:2; + u16 pwm_bkl_ctrl:2; + u16 rsvd3:4; u16 rsvd4; diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h index e6cb252..4fde83b 100644 --- a/drivers/gpu/drm/i915/intel_dsi.h +++ b/drivers/gpu/drm/i915/intel_dsi.h @@ -74,6 +74,8 @@ struct intel_dsi { u8 escape_clk_div; u8 dual_link; + u8 bkl_dcs_ports; + u8 pwm_blk_ctrl; u8 pixel_overlap; u32 port_bits; u32 bw_timer;
For dual link panel scenarios there are new fileds added in the VBT which indicate on which port the PWM cntrl and CABC ON/OFF commands needs to be sent. Cc: Jani Nikula <jani.nikula@intel.com> Cc: Daniel Vetter <daniel.vetter@intel.com> Cc: Yetunde Adebisi <yetundex.adebisi@intel.com> Signed-off-by: Deepak M <m.deepak@intel.com> --- drivers/gpu/drm/i915/intel_bios.c | 13 +++++++++++++ drivers/gpu/drm/i915/intel_bios.h | 5 ++++- drivers/gpu/drm/i915/intel_dsi.h | 2 ++ 3 files changed, 19 insertions(+), 1 deletion(-)