| Message ID | 1451321985-13728-3-git-send-email-joao.m.martins@oracle.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 28/12/2015 16:59, Joao Martins wrote: > Introduce support for using TSC as platform time which is the highest > resolution time and most performant to get (~20 nsecs). Though there > are also several problems associated with its usage, and there isn't a > complete (and architecturally defined) guarantee that all machines > will provide reliable and monotonic TSC across all CPUs, on different > sockets and different P/C states. I believe Intel to be the only that > can guarantee that. For this reason it's set with less priority when > compared to HPET unless adminstrator changes "clocksource" boot option > to "tsc". Upon initializing it, we also check for time warps and > appropriate CPU features i.e. TSC_RELIABLE, CONSTANT_TSC and > NONSTOP_TSC. And in case none of these conditions are met, we fail in > order to fallback to the next available clocksource. > > It is also worth nothing that with clocksource=tsc there isn't no I presume you mean "worth noting" and either "is no" or "isn't any"? However, looking at the sentence below, do you mean "isn't any need to synchronise with another clocksource" ? > synchronization with another clocksource, and I could verify that > great portion the time skew was eliminated and seeing much less time > warps happening. With HPET I used to observe ~500 warps in the period > of 1h of around 27 us, and with TSC down to 50 warps in the same > period having each warp < 100 ns. The warps still exist though but > are only related to cross CPU calibration (being how much it takes to > rendezvous with master), in which a later patch in this series aims to > solve. > > Signed-off-by: Joao Martins <joao.m.martins@oracle.com> > --- > xen/arch/x86/time.c | 63 +++++++++++++++++++++++++++++++++++++++++++++++++++-- > 1 file changed, 61 insertions(+), 2 deletions(-) > > diff --git a/xen/arch/x86/time.c b/xen/arch/x86/time.c > index 30d52c4..c9e5c14 100644 > --- a/xen/arch/x86/time.c > +++ b/xen/arch/x86/time.c > @@ -433,6 +433,64 @@ uint64_t ns_to_acpi_pm_tick(uint64_t ns) > } > > /************************************************************ > + * PLATFORM TIMER 4: TSC > + */ > +static bool_t clocksource_is_tsc = 0; What does clocksource_is_tsc signify? It looks to be unused in this patch. ~Andrew
On 12/29/2015 03:11 PM, Andrew Cooper wrote: > On 28/12/2015 16:59, Joao Martins wrote: >> Introduce support for using TSC as platform time which is the highest >> resolution time and most performant to get (~20 nsecs). Though there >> are also several problems associated with its usage, and there isn't a >> complete (and architecturally defined) guarantee that all machines >> will provide reliable and monotonic TSC across all CPUs, on different >> sockets and different P/C states. I believe Intel to be the only that >> can guarantee that. For this reason it's set with less priority when >> compared to HPET unless adminstrator changes "clocksource" boot option >> to "tsc". Upon initializing it, we also check for time warps and >> appropriate CPU features i.e. TSC_RELIABLE, CONSTANT_TSC and >> NONSTOP_TSC. And in case none of these conditions are met, we fail in >> order to fallback to the next available clocksource. >> >> It is also worth nothing that with clocksource=tsc there isn't no > > I presume you mean "worth noting" and either "is no" or "isn't any"? > Yeap. > However, looking at the sentence below, do you mean "isn't any need to > synchronise with another clocksource" ? That's correct. Will fix the commit message with these on the next version. > >> synchronization with another clocksource, and I could verify that >> great portion the time skew was eliminated and seeing much less time >> warps happening. With HPET I used to observe ~500 warps in the period >> of 1h of around 27 us, and with TSC down to 50 warps in the same >> period having each warp < 100 ns. The warps still exist though but >> are only related to cross CPU calibration (being how much it takes to >> rendezvous with master), in which a later patch in this series aims to >> solve. >> >> Signed-off-by: Joao Martins <joao.m.martins@oracle.com> >> --- >> xen/arch/x86/time.c | 63 +++++++++++++++++++++++++++++++++++++++++++++++++++-- >> 1 file changed, 61 insertions(+), 2 deletions(-) >> >> diff --git a/xen/arch/x86/time.c b/xen/arch/x86/time.c >> index 30d52c4..c9e5c14 100644 >> --- a/xen/arch/x86/time.c >> +++ b/xen/arch/x86/time.c >> @@ -433,6 +433,64 @@ uint64_t ns_to_acpi_pm_tick(uint64_t ns) >> } >> >> /************************************************************ >> + * PLATFORM TIMER 4: TSC >> + */ >> +static bool_t clocksource_is_tsc = 0; > > What does clocksource_is_tsc signify? It looks to be unused in this patch. > Ah right, it's unused here which is wrong. It should only be added on patch 5 of this series, which is where it gets used. > ~Andrew >
diff --git a/xen/arch/x86/time.c b/xen/arch/x86/time.c index 30d52c4..c9e5c14 100644 --- a/xen/arch/x86/time.c +++ b/xen/arch/x86/time.c @@ -433,6 +433,64 @@ uint64_t ns_to_acpi_pm_tick(uint64_t ns) } /************************************************************ + * PLATFORM TIMER 4: TSC + */ +static bool_t clocksource_is_tsc = 0; +static u64 tsc_freq; +static unsigned long tsc_max_warp; +static void tsc_check_reliability(void); + +static int __init init_tsctimer(struct platform_timesource *pts) +{ + bool_t tsc_reliable = 0; + + tsc_check_reliability(); + + if ( tsc_max_warp > 0 ) + { + tsc_reliable = 0; + printk("TSC: didn't passed warp test\n"); + } + else if ( boot_cpu_has(X86_FEATURE_TSC_RELIABLE) || + ( boot_cpu_has(X86_FEATURE_CONSTANT_TSC) && + boot_cpu_has(X86_FEATURE_NONSTOP_TSC) ) ) + { + tsc_reliable = 1; + } + else if ( boot_cpu_has(X86_FEATURE_CONSTANT_TSC) ) + { + tsc_reliable = (max_cstate <= 2); + + if (tsc_reliable) + printk("TSC: no deep Cstates, deemed reliable\n"); + else + printk("TSC: deep Cstates possible, so not reliable\n"); + } + + pts->frequency = tsc_freq; + return ( clocksource_is_tsc = tsc_reliable ); +} + +static u64 read_tsc(void) +{ + return rdtsc(); +} + +static void resume_tsctimer(struct platform_timesource *pts) +{ +} + +static struct platform_timesource __initdata plt_tsc = +{ + .id = "tsc", + .name = "TSC", + .read_counter = read_tsc, + .counter_bits = 64, + .init = init_tsctimer, + .resume = resume_tsctimer, +}; + +/************************************************************ * GENERIC PLATFORM TIMER INFRASTRUCTURE */ @@ -537,7 +595,7 @@ static void resume_platform_timer(void) static void __init init_platform_timer(void) { static struct platform_timesource * __initdata plt_timers[] = { - &plt_hpet, &plt_pmtimer, &plt_pit + &plt_hpet, &plt_tsc, &plt_pmtimer, &plt_pit }; struct platform_timesource *pts = NULL; @@ -1174,7 +1232,7 @@ static void check_tsc_warp(unsigned long tsc_khz, unsigned long *max_warp) } } -static unsigned long tsc_max_warp, tsc_check_count; +static unsigned long tsc_check_count; static cpumask_t tsc_check_cpumask; static void tsc_check_slave(void *unused) @@ -1458,6 +1516,7 @@ void __init early_time_init(void) struct cpu_time *t = &this_cpu(cpu_time); u64 tmp = init_pit_and_calibrate_tsc(); + tsc_freq = tmp; set_time_scale(&t->tsc_scale, tmp); t->local_tsc_stamp = boot_tsc_stamp;
Introduce support for using TSC as platform time which is the highest resolution time and most performant to get (~20 nsecs). Though there are also several problems associated with its usage, and there isn't a complete (and architecturally defined) guarantee that all machines will provide reliable and monotonic TSC across all CPUs, on different sockets and different P/C states. I believe Intel to be the only that can guarantee that. For this reason it's set with less priority when compared to HPET unless adminstrator changes "clocksource" boot option to "tsc". Upon initializing it, we also check for time warps and appropriate CPU features i.e. TSC_RELIABLE, CONSTANT_TSC and NONSTOP_TSC. And in case none of these conditions are met, we fail in order to fallback to the next available clocksource. It is also worth nothing that with clocksource=tsc there isn't no synchronization with another clocksource, and I could verify that great portion the time skew was eliminated and seeing much less time warps happening. With HPET I used to observe ~500 warps in the period of 1h of around 27 us, and with TSC down to 50 warps in the same period having each warp < 100 ns. The warps still exist though but are only related to cross CPU calibration (being how much it takes to rendezvous with master), in which a later patch in this series aims to solve. Signed-off-by: Joao Martins <joao.m.martins@oracle.com> --- xen/arch/x86/time.c | 63 +++++++++++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 61 insertions(+), 2 deletions(-)