diff mbox

[v2,1/4] ARM: dts: imx7d: add arch timer

Message ID 1452014237-12848-1-git-send-email-Frank.Li@nxp.com (mailing list archive)
State New, archived
Headers show

Commit Message

Frank Li Jan. 5, 2016, 5:17 p.m. UTC 
From: Frank Li <Frank.Li@freescale.com>

Since uboot v2016.01-rc2, which supported basic psci for i.mx7d.
So imx7d's second core can be enabled by psci.

Without arch timer, every timer event will be boardcasted to each core.
arch timer has local timer irq for each core.

Signed-off-by: Frank Li <Frank.Li@freescale.com>
---

Change from v1 to v2:
 * refine commit message show the relationship between smp and arch timer

 arch/arm/boot/dts/imx7d.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

Comments

Zhi Li Jan. 21, 2016, 10:39 p.m. UTC | #1 
On Tue, Jan 5, 2016 at 11:17 AM, Frank Li <Frank.Li@nxp.com> wrote:
> From: Frank Li <Frank.Li@freescale.com>
>
> Since uboot v2016.01-rc2, which supported basic psci for i.mx7d.
> So imx7d's second core can be enabled by psci.
>
> Without arch timer, every timer event will be boardcasted to each core.
> arch timer has local timer irq for each core.
>
> Signed-off-by: Frank Li <Frank.Li@freescale.com>
> ---

Ping

>
> Change from v1 to v2:
>  * refine commit message show the relationship between smp and arch timer
>
>  arch/arm/boot/dts/imx7d.dtsi | 9 +++++++++
>  1 file changed, 9 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx7d.dtsi b/arch/arm/boot/dts/imx7d.dtsi
> index 489604a..a621af6 100644
> --- a/arch/arm/boot/dts/imx7d.dtsi
> +++ b/arch/arm/boot/dts/imx7d.dtsi
> @@ -119,6 +119,15 @@
>                 clock-output-names = "osc";
>         };
>
> +       timer {
> +               compatible = "arm,armv7-timer";
> +               interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> +                            <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> +                            <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> +                            <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
> +               interrupt-parent = <&intc>;
> +       };
> +
>         etr@30086000 {
>                 compatible = "arm,coresight-tmc", "arm,primecell";
>                 reg = <0x30086000 0x1000>;
> --
> 2.5.2
>
Shawn Guo Jan. 28, 2016, 8:34 a.m. UTC | #2 
On Tue, Jan 05, 2016 at 11:17:14AM -0600, Frank Li wrote:
> From: Frank Li <Frank.Li@freescale.com>
> 
> Since uboot v2016.01-rc2, which supported basic psci for i.mx7d.
> So imx7d's second core can be enabled by psci.
> 
> Without arch timer, every timer event will be boardcasted to each core.
> arch timer has local timer irq for each core.
> 
> Signed-off-by: Frank Li <Frank.Li@freescale.com>

Applied all, thanks.
diff mbox

Patch

diff --git a/arch/arm/boot/dts/imx7d.dtsi b/arch/arm/boot/dts/imx7d.dtsi
index 489604a..a621af6 100644
--- a/arch/arm/boot/dts/imx7d.dtsi
+++ b/arch/arm/boot/dts/imx7d.dtsi
@@ -119,6 +119,15 @@ 
 		clock-output-names = "osc";
 	};
 
+	timer {
+		compatible = "arm,armv7-timer";
+		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+		interrupt-parent = <&intc>;
+	};
+
 	etr@30086000 {
 		compatible = "arm,coresight-tmc", "arm,primecell";
 		reg = <0x30086000 0x1000>;