| Message ID | 1453779018-30666-1-git-send-email-shawn.lin@rock-chips.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Hi Shawn, Reviewed-by: Xing Zheng <zhengxing@rock-chips.com> Thanks. On 2016?01?26? 11:30, Shawn Lin wrote: > mmc sample shift is 0 for rk3228 refer to user manaul. > So it's broken if we enable mmc tuning for rk3228. > > Fixes: 307a2e9ac ("clk: rockchip: add clock controller for rk3228") > Cc: Xing Zheng<zhengxing@rock-chips.com> > Cc: Jeffy Chen<jeffy.chen@rock-chips.com> > Signed-off-by: Shawn Lin<shawn.lin@rock-chips.com> > --- > > drivers/clk/rockchip/clk-rk3228.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/drivers/clk/rockchip/clk-rk3228.c b/drivers/clk/rockchip/clk-rk3228.c > index 981a502..97f49aa 100644 > --- a/drivers/clk/rockchip/clk-rk3228.c > +++ b/drivers/clk/rockchip/clk-rk3228.c > @@ -605,13 +605,13 @@ static struct rockchip_clk_branch rk3228_clk_branches[] __initdata = { > > /* PD_MMC */ > MMC(SCLK_SDMMC_DRV, "sdmmc_drv", "sclk_sdmmc", RK3228_SDMMC_CON0, 1), > - MMC(SCLK_SDMMC_SAMPLE, "sdmmc_sample", "sclk_sdmmc", RK3228_SDMMC_CON1, 1), > + MMC(SCLK_SDMMC_SAMPLE, "sdmmc_sample", "sclk_sdmmc", RK3228_SDMMC_CON1, 0), > > MMC(SCLK_SDIO_DRV, "sdio_drv", "sclk_sdio", RK3228_SDIO_CON0, 1), > - MMC(SCLK_SDIO_SAMPLE, "sdio_sample", "sclk_sdio", RK3228_SDIO_CON1, 1), > + MMC(SCLK_SDIO_SAMPLE, "sdio_sample", "sclk_sdio", RK3228_SDIO_CON1, 0), > > MMC(SCLK_EMMC_DRV, "emmc_drv", "sclk_emmc", RK3228_EMMC_CON0, 1), > - MMC(SCLK_EMMC_SAMPLE, "emmc_sample", "sclk_emmc", RK3228_EMMC_CON1, 1), > + MMC(SCLK_EMMC_SAMPLE, "emmc_sample", "sclk_emmc", RK3228_EMMC_CON1, 0), > }; > > static const char *const rk3228_critical_clocks[] __initconst = {
Am Dienstag, 26. Januar 2016, 11:30:18 schrieb Shawn Lin: > mmc sample shift is 0 for rk3228 refer to user manaul. > So it's broken if we enable mmc tuning for rk3228. > > Fixes: 307a2e9ac ("clk: rockchip: add clock controller for rk3228") > Cc: Xing Zheng <zhengxing@rock-chips.com> > Cc: Jeffy Chen <jeffy.chen@rock-chips.com> > Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> applied to my clk branch for 4.6 with Xing's review Thanks Heiko
On 01/26, Shawn Lin wrote: > mmc sample shift is 0 for rk3228 refer to user manaul. > So it's broken if we enable mmc tuning for rk3228. > > Fixes: 307a2e9ac ("clk: rockchip: add clock controller for rk3228") > Cc: Xing Zheng <zhengxing@rock-chips.com> > Cc: Jeffy Chen <jeffy.chen@rock-chips.com> > Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> > --- Acked-by: Stephen Boyd <sboyd@codeaurora.org>
diff --git a/drivers/clk/rockchip/clk-rk3228.c b/drivers/clk/rockchip/clk-rk3228.c index 981a502..97f49aa 100644 --- a/drivers/clk/rockchip/clk-rk3228.c +++ b/drivers/clk/rockchip/clk-rk3228.c @@ -605,13 +605,13 @@ static struct rockchip_clk_branch rk3228_clk_branches[] __initdata = { /* PD_MMC */ MMC(SCLK_SDMMC_DRV, "sdmmc_drv", "sclk_sdmmc", RK3228_SDMMC_CON0, 1), - MMC(SCLK_SDMMC_SAMPLE, "sdmmc_sample", "sclk_sdmmc", RK3228_SDMMC_CON1, 1), + MMC(SCLK_SDMMC_SAMPLE, "sdmmc_sample", "sclk_sdmmc", RK3228_SDMMC_CON1, 0), MMC(SCLK_SDIO_DRV, "sdio_drv", "sclk_sdio", RK3228_SDIO_CON0, 1), - MMC(SCLK_SDIO_SAMPLE, "sdio_sample", "sclk_sdio", RK3228_SDIO_CON1, 1), + MMC(SCLK_SDIO_SAMPLE, "sdio_sample", "sclk_sdio", RK3228_SDIO_CON1, 0), MMC(SCLK_EMMC_DRV, "emmc_drv", "sclk_emmc", RK3228_EMMC_CON0, 1), - MMC(SCLK_EMMC_SAMPLE, "emmc_sample", "sclk_emmc", RK3228_EMMC_CON1, 1), + MMC(SCLK_EMMC_SAMPLE, "emmc_sample", "sclk_emmc", RK3228_EMMC_CON1, 0), }; static const char *const rk3228_critical_clocks[] __initconst = {
mmc sample shift is 0 for rk3228 refer to user manaul. So it's broken if we enable mmc tuning for rk3228. Fixes: 307a2e9ac ("clk: rockchip: add clock controller for rk3228") Cc: Xing Zheng <zhengxing@rock-chips.com> Cc: Jeffy Chen <jeffy.chen@rock-chips.com> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> --- drivers/clk/rockchip/clk-rk3228.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)