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[1/5] drm/i915: Add TIMESTAMP to register whitelist

Message ID 1457335830-30923-2-git-send-email-jordan.l.justen@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Jordan Justen March 7, 2016, 7:30 a.m. UTC 
This is needed for the Mesa Vulkan driver on Haswell.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Cc: Kristian Høgsberg <krh@bitplanet.net>
Cc: Kenneth Graunke <kenneth@whitecape.org>
---
 drivers/gpu/drm/i915/i915_cmd_parser.c | 1 +
 1 file changed, 1 insertion(+)

Comments

Francisco Jerez March 8, 2016, 10:06 p.m. UTC | #1 
Jordan Justen <jordan.l.justen@intel.com> writes:

> This is needed for the Mesa Vulkan driver on Haswell.
>
> Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
> Cc: Kristian Høgsberg <krh@bitplanet.net>
> Cc: Kenneth Graunke <kenneth@whitecape.org>

Reviewed-by: Francisco Jerez <currojerez@riseup.net>

> ---
>  drivers/gpu/drm/i915/i915_cmd_parser.c | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c b/drivers/gpu/drm/i915/i915_cmd_parser.c
> index 814d894..86d7cda 100644
> --- a/drivers/gpu/drm/i915/i915_cmd_parser.c
> +++ b/drivers/gpu/drm/i915/i915_cmd_parser.c
> @@ -444,6 +444,7 @@ static const struct drm_i915_reg_descriptor gen7_render_regs[] = {
>  	REG64(CL_PRIMITIVES_COUNT),
>  	REG64(PS_INVOCATION_COUNT),
>  	REG64(PS_DEPTH_COUNT),
> +	REG64_IDX(RING_TIMESTAMP, RENDER_RING_BASE),
>  	REG32(OACONTROL), /* Only allowed for LRI and SRM. See below. */
>  	REG64(MI_PREDICATE_SRC0),
>  	REG64(MI_PREDICATE_SRC1),
> -- 
> 2.7.0
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c b/drivers/gpu/drm/i915/i915_cmd_parser.c
index 814d894..86d7cda 100644
--- a/drivers/gpu/drm/i915/i915_cmd_parser.c
+++ b/drivers/gpu/drm/i915/i915_cmd_parser.c
@@ -444,6 +444,7 @@  static const struct drm_i915_reg_descriptor gen7_render_regs[] = {
 	REG64(CL_PRIMITIVES_COUNT),
 	REG64(PS_INVOCATION_COUNT),
 	REG64(PS_DEPTH_COUNT),
+	REG64_IDX(RING_TIMESTAMP, RENDER_RING_BASE),
 	REG32(OACONTROL), /* Only allowed for LRI and SRM. See below. */
 	REG64(MI_PREDICATE_SRC0),
 	REG64(MI_PREDICATE_SRC1),