| Message ID | 1458121432-2855-1-git-send-email-lvivier@redhat.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 16.03.16 10:43, Laurent Vivier wrote: > When a qemu-system-ppc64 is started, the 64-bit mode bit > is not set in MSR. > > Signed-off-by: Laurent Vivier <lvivier@redhat.com> I guess commit 2cf3eb6df552cee74b52de9989e270b74e42847e broke this. I'm surprised it didn't cause us more problems :). Reviewed-by: Alexander Graf <agraf@suse.de> > --- > target-ppc/translate_init.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c > index bd0cffc..d7a1aeb 100644 > --- a/target-ppc/translate_init.c > +++ b/target-ppc/translate_init.c > @@ -9663,7 +9663,7 @@ static void ppc_cpu_reset(CPUState *s) > > #if defined(TARGET_PPC64) > if (env->mmu_model & POWERPC_MMU_64) { > - env->msr |= (1ULL << MSR_SF); > + msr |= (1ULL << MSR_SF); > } > #endif > >
On 16/03/2016 10:48, Alexander Graf wrote: > > > On 16.03.16 10:43, Laurent Vivier wrote: >> When a qemu-system-ppc64 is started, the 64-bit mode bit >> is not set in MSR. >> >> Signed-off-by: Laurent Vivier <lvivier@redhat.com> > > I guess commit 2cf3eb6df552cee74b52de9989e270b74e42847e broke this. I'm > surprised it didn't cause us more problems :). Linux kernel is ready to manage that: see enable_64b_mode in arch/powerpc/kernel/head_64.S > Reviewed-by: Alexander Graf <agraf@suse.de> Thanks, Laurent >> --- >> target-ppc/translate_init.c | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c >> index bd0cffc..d7a1aeb 100644 >> --- a/target-ppc/translate_init.c >> +++ b/target-ppc/translate_init.c >> @@ -9663,7 +9663,7 @@ static void ppc_cpu_reset(CPUState *s) >> >> #if defined(TARGET_PPC64) >> if (env->mmu_model & POWERPC_MMU_64) { >> - env->msr |= (1ULL << MSR_SF); >> + msr |= (1ULL << MSR_SF); >> } >> #endif >> >>
On 16.03.16 11:05, Laurent Vivier wrote: > On 16/03/2016 10:48, Alexander Graf wrote: >> >> >> On 16.03.16 10:43, Laurent Vivier wrote: >>> When a qemu-system-ppc64 is started, the 64-bit mode bit >>> is not set in MSR. >>> >>> Signed-off-by: Laurent Vivier <lvivier@redhat.com> >> >> I guess commit 2cf3eb6df552cee74b52de9989e270b74e42847e broke this. I'm >> surprised it didn't cause us more problems :). > > Linux kernel is ready to manage that: see enable_64b_mode in > arch/powerpc/kernel/head_64.S We don't boot Linux directly though, only openBIOS and SLOF :). Alex
On 16/03/2016 11:06, Alexander Graf wrote: > > > On 16.03.16 11:05, Laurent Vivier wrote: >> On 16/03/2016 10:48, Alexander Graf wrote: >>> >>> >>> On 16.03.16 10:43, Laurent Vivier wrote: >>>> When a qemu-system-ppc64 is started, the 64-bit mode bit >>>> is not set in MSR. >>>> >>>> Signed-off-by: Laurent Vivier <lvivier@redhat.com> >>> >>> I guess commit 2cf3eb6df552cee74b52de9989e270b74e42847e broke this. I'm >>> surprised it didn't cause us more problems :). >> >> Linux kernel is ready to manage that: see enable_64b_mode in >> arch/powerpc/kernel/head_64.S > > We don't boot Linux directly though, only openBIOS and SLOF :). Same thing in SLOF: ./board-qemu/llfw/startup.S _start: ... mfmsr r11 /* grab the current MSR */ li r12,(MSR_SF | MSR_ISF)@highest sldi r12,r12,48 or r11,r11,r12 mtmsrd r11 isync And openbios seems to disable it explicitly: ./arch/ppc/qemu/start.S _entry: ... /* clear MSR, disable MMU, SF */ [BTW, I've never been able to compile a 64bit version of openbios...] Laurent
On 16.03.2016 11:06, Alexander Graf wrote: > > > On 16.03.16 11:05, Laurent Vivier wrote: >> On 16/03/2016 10:48, Alexander Graf wrote: >>> >>> >>> On 16.03.16 10:43, Laurent Vivier wrote: >>>> When a qemu-system-ppc64 is started, the 64-bit mode bit >>>> is not set in MSR. >>>> >>>> Signed-off-by: Laurent Vivier <lvivier@redhat.com> >>> >>> I guess commit 2cf3eb6df552cee74b52de9989e270b74e42847e broke this. I'm >>> surprised it didn't cause us more problems :). >> >> Linux kernel is ready to manage that: see enable_64b_mode in >> arch/powerpc/kernel/head_64.S > > We don't boot Linux directly though, only openBIOS and SLOF :). Both, SLOF and OpenBIOS, seem to enable the SF bit manually, too, see: https://github.com/qemu/openbios/blob/master/arch/ppc/qemu/start.S#L524 https://github.com/aik/SLOF/blob/master/board-qemu/llfw/startup.S#L91 Thomas
On 16.03.16 11:32, Thomas Huth wrote: > On 16.03.2016 11:06, Alexander Graf wrote: >> >> >> On 16.03.16 11:05, Laurent Vivier wrote: >>> On 16/03/2016 10:48, Alexander Graf wrote: >>>> >>>> >>>> On 16.03.16 10:43, Laurent Vivier wrote: >>>>> When a qemu-system-ppc64 is started, the 64-bit mode bit >>>>> is not set in MSR. >>>>> >>>>> Signed-off-by: Laurent Vivier <lvivier@redhat.com> >>>> >>>> I guess commit 2cf3eb6df552cee74b52de9989e270b74e42847e broke this. I'm >>>> surprised it didn't cause us more problems :). >>> >>> Linux kernel is ready to manage that: see enable_64b_mode in >>> arch/powerpc/kernel/head_64.S >> >> We don't boot Linux directly though, only openBIOS and SLOF :). > > Both, SLOF and OpenBIOS, seem to enable the SF bit manually, too, see: > > https://github.com/qemu/openbios/blob/master/arch/ppc/qemu/start.S#L524 > > https://github.com/aik/SLOF/blob/master/board-qemu/llfw/startup.S#L91 Power up is slightly tricky, as machine state is pushed into the CPU from the outside FWIW. I think we're "cleanest" if we just consider power up a reset. Reset is properly defined as an exception (0x100). For exceptions, the 970MP user manual for example says: 4.5 Exception Definitions When an exception/interrupt is taken, all bits in the MSR are set to ‘0’, with the following exceptions: • Exceptions always set MSR[SF] to ‘1’. So the qemu fix is the correct one IMHO. Alex
On Wed, Mar 16, 2016 at 10:43:52AM +0100, Laurent Vivier wrote: > When a qemu-system-ppc64 is started, the 64-bit mode bit > is not set in MSR. > > Signed-off-by: Laurent Vivier <lvivier@redhat.com> Applied to ppc-for-2.6, thanks. > --- > target-ppc/translate_init.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c > index bd0cffc..d7a1aeb 100644 > --- a/target-ppc/translate_init.c > +++ b/target-ppc/translate_init.c > @@ -9663,7 +9663,7 @@ static void ppc_cpu_reset(CPUState *s) > > #if defined(TARGET_PPC64) > if (env->mmu_model & POWERPC_MMU_64) { > - env->msr |= (1ULL << MSR_SF); > + msr |= (1ULL << MSR_SF); > } > #endif >
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index bd0cffc..d7a1aeb 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -9663,7 +9663,7 @@ static void ppc_cpu_reset(CPUState *s) #if defined(TARGET_PPC64) if (env->mmu_model & POWERPC_MMU_64) { - env->msr |= (1ULL << MSR_SF); + msr |= (1ULL << MSR_SF); } #endif
When a qemu-system-ppc64 is started, the 64-bit mode bit is not set in MSR. Signed-off-by: Laurent Vivier <lvivier@redhat.com> --- target-ppc/translate_init.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)