[13/49] target-ppc: do not use target_ulong in cpu-qom.h

Commit Message

Paolo Bonzini March 16, 2016, 10:46 a.m. UTC

Using vaddr makes the cpu-qom.h file target independent

Signed-off-by: Paolo Bonzini <[e-mail]>
---
 target-ppc/cpu-qom.h    | 3 +--
 target-ppc/mmu-hash32.c | 2 +-
 target-ppc/mmu-hash32.h | 2 +-
 target-ppc/mmu-hash64.c | 2 +-
 target-ppc/mmu-hash64.h | 2 +-
 5 files changed, 5 insertions(+), 6 deletions(-)

Comments

Peter Maydell March 16, 2016, 1:02 p.m. UTC | #1

On 16 March 2016 at 10:46, Paolo Bonzini <[e-mail]> wrote:
> Using vaddr makes the cpu-qom.h file target independent

Also brings the PowerPCCPUClass handle_mmu_fault method type
into line with the one in CPUState.

(Speaking of which, target-ppc/translate_init.c defines a
cpu_ppc_handle_mmu_fault() which takes a target_ulong address
and then assigns it to the cc->handle_mmu_fault pointer, which
is wrong.)

thanks
-- PMM

Patch

diff --git a/target-ppc/cpu-qom.h b/target-ppc/cpu-qom.h
index eb822a3..bab501f 100644
--- a/target-ppc/cpu-qom.h
+++ b/target-ppc/cpu-qom.h
@@ -73,8 +73,7 @@  typedef struct PowerPCCPUClass {
     void (*init_proc)(CPUPPCState *env);
     int  (*check_pow)(CPUPPCState *env);
 #if defined(CONFIG_SOFTMMU)
-    int (*handle_mmu_fault)(PowerPCCPU *cpu, target_ulong eaddr, int rwx,
-                            int mmu_idx);
+    int (*handle_mmu_fault)(PowerPCCPU *cpu, vaddr eaddr, int rwx, int mmu_idx);
 #endif
     bool (*interrupts_big_endian)(PowerPCCPU *cpu);
 } PowerPCCPUClass;
diff --git a/target-ppc/mmu-hash32.c b/target-ppc/mmu-hash32.c
index 39abb2f..06ce4d6 100644
--- a/target-ppc/mmu-hash32.c
+++ b/target-ppc/mmu-hash32.c
@@ -383,7 +383,7 @@  static hwaddr ppc_hash32_pte_raddr(target_ulong sr, ppc_hash_pte32_t pte,
     return (rpn & ~mask) | (eaddr & mask);
 }
 
-int ppc_hash32_handle_mmu_fault(PowerPCCPU *cpu, target_ulong eaddr, int rwx,
+int ppc_hash32_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, int rwx,
                                 int mmu_idx)
 {
     CPUState *cs = CPU(cpu);
diff --git a/target-ppc/mmu-hash32.h b/target-ppc/mmu-hash32.h
index afbb9dd..aaceacd 100644
--- a/target-ppc/mmu-hash32.h
+++ b/target-ppc/mmu-hash32.h
@@ -5,7 +5,7 @@ 
 
 hwaddr get_pteg_offset32(PowerPCCPU *cpu, hwaddr hash);
 hwaddr ppc_hash32_get_phys_page_debug(PowerPCCPU *cpu, target_ulong addr);
-int ppc_hash32_handle_mmu_fault(PowerPCCPU *cpu, target_ulong address, int rw,
+int ppc_hash32_handle_mmu_fault(PowerPCCPU *cpu, vaddr address, int rw,
                                 int mmu_idx);
 
 /*
diff --git a/target-ppc/mmu-hash64.c b/target-ppc/mmu-hash64.c
index 9c58fbf..13fb634 100644
--- a/target-ppc/mmu-hash64.c
+++ b/target-ppc/mmu-hash64.c
@@ -549,7 +549,7 @@  unsigned ppc_hash64_hpte_page_shift_noslb(PowerPCCPU *cpu,
     return 0;
 }
 
-int ppc_hash64_handle_mmu_fault(PowerPCCPU *cpu, target_ulong eaddr,
+int ppc_hash64_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr,
                                 int rwx, int mmu_idx)
 {
     CPUState *cs = CPU(cpu);
diff --git a/target-ppc/mmu-hash64.h b/target-ppc/mmu-hash64.h
index e7d9925..d362cfb 100644
--- a/target-ppc/mmu-hash64.h
+++ b/target-ppc/mmu-hash64.h
@@ -9,7 +9,7 @@  void dump_slb(FILE *f, fprintf_function cpu_fprintf, PowerPCCPU *cpu);
 int ppc_store_slb(PowerPCCPU *cpu, target_ulong slot,
                   target_ulong esid, target_ulong vsid);
 hwaddr ppc_hash64_get_phys_page_debug(PowerPCCPU *cpu, target_ulong addr);
-int ppc_hash64_handle_mmu_fault(PowerPCCPU *cpu, target_ulong address, int rw,
+int ppc_hash64_handle_mmu_fault(PowerPCCPU *cpu, vaddr address, int rw,
                                 int mmu_idx);
 void ppc_hash64_store_hpte(PowerPCCPU *cpu, target_ulong index,
                            target_ulong pte0, target_ulong pte1);