| Message ID | 1460621819-695-4-git-send-email-jamesjj.liao@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Thu, 2016-04-14 at 16:16 +0800, James Liao wrote: > From: Shunli Wang <shunli.wang@mediatek.com> > > Add power dt-bindings for MT2701. > > Signed-off-by: Shunli Wang <shunli.wang@mediatek.com> > Signed-off-by: James Liao <jamesjj.liao@mediatek.com> > Acked-by: Rob Herring <robh@kernel.org> > Reviewed-by: Kevin Hilman <khilman@baylibre.com> > --- > .../devicetree/bindings/soc/mediatek/scpsys.txt | 12 ++++++---- > include/dt-bindings/power/mt2701-power.h | 27 ++++++++++++++++++++++ > 2 files changed, 34 insertions(+), 5 deletions(-) > create mode 100644 include/dt-bindings/power/mt2701-power.h > > diff --git a/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt b/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt > index e8f15e3..ebb3144 100644 > --- a/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt > +++ b/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt > @@ -9,17 +9,19 @@ domain control. > > The driver implements the Generic PM domain bindings described in > power/power_domain.txt. It provides the power domains defined in > -include/dt-bindings/power/mt8173-power.h. > +include/dt-bindings/power/mt8173-power.h and mt2701-power.h. > > Required properties: > -- compatible: Must be "mediatek,mt8173-scpsys" > +- compatible: Should be one of: > + - "mediatek,mt2701-scpsys" > + - "mediatek,mt8173-scpsys" > - #power-domain-cells: Must be 1 > - reg: Address range of the SCPSYS unit > - infracfg: must contain a phandle to the infracfg controller > - clock, clock-names: clocks according to the common clock binding. > - The clocks needed "mm", "mfg", "venc" and "venc_lt". > - These are the clocks which hardware needs to be enabled > - before enabling certain power domains. > + The clocks needed "mm", "mfg", "venc", "venc_lt" and > + "ethif". These are the clocks which hardware needs to be > + enabled before enabling certain power domains. Clock ethif only exist on mt2701 so it is not required on mt8173. Joe.C
Hi Yingjoe, On Thu, 2016-04-14 at 18:56 +0800, Yingjoe Chen wrote: > On Thu, 2016-04-14 at 16:16 +0800, James Liao wrote: > > From: Shunli Wang <shunli.wang@mediatek.com> > > > > Add power dt-bindings for MT2701. > > > > Signed-off-by: Shunli Wang <shunli.wang@mediatek.com> > > Signed-off-by: James Liao <jamesjj.liao@mediatek.com> > > Acked-by: Rob Herring <robh@kernel.org> > > Reviewed-by: Kevin Hilman <khilman@baylibre.com> > > --- > > .../devicetree/bindings/soc/mediatek/scpsys.txt | 12 ++++++---- > > include/dt-bindings/power/mt2701-power.h | 27 ++++++++++++++++++++++ > > 2 files changed, 34 insertions(+), 5 deletions(-) > > create mode 100644 include/dt-bindings/power/mt2701-power.h > > > > diff --git a/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt b/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt > > index e8f15e3..ebb3144 100644 > > --- a/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt > > +++ b/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt > > @@ -9,17 +9,19 @@ domain control. > > > > The driver implements the Generic PM domain bindings described in > > power/power_domain.txt. It provides the power domains defined in > > -include/dt-bindings/power/mt8173-power.h. > > +include/dt-bindings/power/mt8173-power.h and mt2701-power.h. > > > > Required properties: > > -- compatible: Must be "mediatek,mt8173-scpsys" > > +- compatible: Should be one of: > > + - "mediatek,mt2701-scpsys" > > + - "mediatek,mt8173-scpsys" > > - #power-domain-cells: Must be 1 > > - reg: Address range of the SCPSYS unit > > - infracfg: must contain a phandle to the infracfg controller > > - clock, clock-names: clocks according to the common clock binding. > > - The clocks needed "mm", "mfg", "venc" and "venc_lt". > > - These are the clocks which hardware needs to be enabled > > - before enabling certain power domains. > > + The clocks needed "mm", "mfg", "venc", "venc_lt" and > > + "ethif". These are the clocks which hardware needs to be > > + enabled before enabling certain power domains. > > > Clock ethif only exist on mt2701 so it is not required on mt8173. You are right. Each SoC needs different clock for each power domain. Here list all subsystems of available SoCs. Best regards, James
On Fri, 2016-04-15 at 10:02 +0800, James Liao wrote: > Hi Yingjoe, > > On Thu, 2016-04-14 at 18:56 +0800, Yingjoe Chen wrote: > > On Thu, 2016-04-14 at 16:16 +0800, James Liao wrote: > > > From: Shunli Wang <shunli.wang@mediatek.com> > > > > > > Add power dt-bindings for MT2701. > > > > > > Signed-off-by: Shunli Wang <shunli.wang@mediatek.com> > > > Signed-off-by: James Liao <jamesjj.liao@mediatek.com> > > > Acked-by: Rob Herring <robh@kernel.org> > > > Reviewed-by: Kevin Hilman <khilman@baylibre.com> > > > --- > > > .../devicetree/bindings/soc/mediatek/scpsys.txt | 12 ++++++---- > > > include/dt-bindings/power/mt2701-power.h | 27 ++++++++++++++++++++++ > > > 2 files changed, 34 insertions(+), 5 deletions(-) > > > create mode 100644 include/dt-bindings/power/mt2701-power.h > > > > > > diff --git a/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt b/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt > > > index e8f15e3..ebb3144 100644 > > > --- a/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt > > > +++ b/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt > > > @@ -9,17 +9,19 @@ domain control. > > > > > > The driver implements the Generic PM domain bindings described in > > > power/power_domain.txt. It provides the power domains defined in > > > -include/dt-bindings/power/mt8173-power.h. > > > +include/dt-bindings/power/mt8173-power.h and mt2701-power.h. > > > > > > Required properties: > > > -- compatible: Must be "mediatek,mt8173-scpsys" > > > +- compatible: Should be one of: > > > + - "mediatek,mt2701-scpsys" > > > + - "mediatek,mt8173-scpsys" > > > - #power-domain-cells: Must be 1 > > > - reg: Address range of the SCPSYS unit > > > - infracfg: must contain a phandle to the infracfg controller > > > - clock, clock-names: clocks according to the common clock binding. > > > - The clocks needed "mm", "mfg", "venc" and "venc_lt". > > > - These are the clocks which hardware needs to be enabled > > > - before enabling certain power domains. > > > + The clocks needed "mm", "mfg", "venc", "venc_lt" and > > > + "ethif". These are the clocks which hardware needs to be > > > + enabled before enabling certain power domains. > > > > > > Clock ethif only exist on mt2701 so it is not required on mt8173. > > You are right. Each SoC needs different clock for each power domain. > Here list all subsystems of available SoCs. Binding should list required clocks for each specific platform. How about this: - clock, clock-names: clocks according to the common clock binding. These are the clocks which hardware needs to be enabled before enabling certain power domains. Required clocks for mt2701: "mm", "mfg", "ethif" Required clocks for mt8173: "mm", "mfg", "venc", "venc_lt" Joe.C
Hi Yingjoe, On Fri, 2016-04-15 at 22:42 +0800, Yingjoe Chen wrote: > On Fri, 2016-04-15 at 10:02 +0800, James Liao wrote: > > On Thu, 2016-04-14 at 18:56 +0800, Yingjoe Chen wrote: > > > On Thu, 2016-04-14 at 16:16 +0800, James Liao wrote: > > > > From: Shunli Wang <shunli.wang@mediatek.com> > > > > > > > > Add power dt-bindings for MT2701. > > > > > > > > Signed-off-by: Shunli Wang <shunli.wang@mediatek.com> > > > > Signed-off-by: James Liao <jamesjj.liao@mediatek.com> > > > > Acked-by: Rob Herring <robh@kernel.org> > > > > Reviewed-by: Kevin Hilman <khilman@baylibre.com> > > > > --- > > > > .../devicetree/bindings/soc/mediatek/scpsys.txt | 12 ++++++---- > > > > include/dt-bindings/power/mt2701-power.h | 27 ++++++++++++++++++++++ > > > > 2 files changed, 34 insertions(+), 5 deletions(-) > > > > create mode 100644 include/dt-bindings/power/mt2701-power.h > > > > > > > > diff --git a/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt b/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt > > > > index e8f15e3..ebb3144 100644 > > > > --- a/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt > > > > +++ b/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt > > > > @@ -9,17 +9,19 @@ domain control. > > > > > > > > The driver implements the Generic PM domain bindings described in > > > > power/power_domain.txt. It provides the power domains defined in > > > > -include/dt-bindings/power/mt8173-power.h. > > > > +include/dt-bindings/power/mt8173-power.h and mt2701-power.h. > > > > > > > > Required properties: > > > > -- compatible: Must be "mediatek,mt8173-scpsys" > > > > +- compatible: Should be one of: > > > > + - "mediatek,mt2701-scpsys" > > > > + - "mediatek,mt8173-scpsys" > > > > - #power-domain-cells: Must be 1 > > > > - reg: Address range of the SCPSYS unit > > > > - infracfg: must contain a phandle to the infracfg controller > > > > - clock, clock-names: clocks according to the common clock binding. > > > > - The clocks needed "mm", "mfg", "venc" and "venc_lt". > > > > - These are the clocks which hardware needs to be enabled > > > > - before enabling certain power domains. > > > > + The clocks needed "mm", "mfg", "venc", "venc_lt" and > > > > + "ethif". These are the clocks which hardware needs to be > > > > + enabled before enabling certain power domains. > > > > > > > > > Clock ethif only exist on mt2701 so it is not required on mt8173. > > > > You are right. Each SoC needs different clock for each power domain. > > Here list all subsystems of available SoCs. > > Binding should list required clocks for each specific platform. How > about this: > > - clock, clock-names: clocks according to the common clock binding. > These are the clocks which hardware needs to be > enabled before enabling certain power domains. > Required clocks for mt2701: "mm", "mfg", "ethif" > Required clocks for mt8173: "mm", "mfg", "venc", "venc_lt" OK. I'll follow your suggestion in next patch. Best regards, James
diff --git a/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt b/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt index e8f15e3..ebb3144 100644 --- a/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt +++ b/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt @@ -9,17 +9,19 @@ domain control. The driver implements the Generic PM domain bindings described in power/power_domain.txt. It provides the power domains defined in -include/dt-bindings/power/mt8173-power.h. +include/dt-bindings/power/mt8173-power.h and mt2701-power.h. Required properties: -- compatible: Must be "mediatek,mt8173-scpsys" +- compatible: Should be one of: + - "mediatek,mt2701-scpsys" + - "mediatek,mt8173-scpsys" - #power-domain-cells: Must be 1 - reg: Address range of the SCPSYS unit - infracfg: must contain a phandle to the infracfg controller - clock, clock-names: clocks according to the common clock binding. - The clocks needed "mm", "mfg", "venc" and "venc_lt". - These are the clocks which hardware needs to be enabled - before enabling certain power domains. + The clocks needed "mm", "mfg", "venc", "venc_lt" and + "ethif". These are the clocks which hardware needs to be + enabled before enabling certain power domains. Optional properties: - vdec-supply: Power supply for the vdec power domain diff --git a/include/dt-bindings/power/mt2701-power.h b/include/dt-bindings/power/mt2701-power.h new file mode 100644 index 0000000..64cc826 --- /dev/null +++ b/include/dt-bindings/power/mt2701-power.h @@ -0,0 +1,27 @@ +/* + * Copyright (C) 2015 MediaTek Inc. + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _DT_BINDINGS_POWER_MT2701_POWER_H +#define _DT_BINDINGS_POWER_MT2701_POWER_H + +#define MT2701_POWER_DOMAIN_CONN 0 +#define MT2701_POWER_DOMAIN_DISP 1 +#define MT2701_POWER_DOMAIN_MFG 2 +#define MT2701_POWER_DOMAIN_VDEC 3 +#define MT2701_POWER_DOMAIN_ISP 4 +#define MT2701_POWER_DOMAIN_BDP 5 +#define MT2701_POWER_DOMAIN_ETH 6 +#define MT2701_POWER_DOMAIN_HIF 7 +#define MT2701_POWER_DOMAIN_IFR_MSC 8 + +#endif /* _DT_BINDINGS_POWER_MT2701_POWER_H */