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[v2,05/16] drm/i915/gen9: Store plane minimum blocks in CRTC wm state

Message ID 1461119183-14267-6-git-send-email-matthew.d.roper@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Matt Roper April 20, 2016, 2:26 a.m. UTC
This will eventually allow us to re-use old values without
re-calculating them for unchanged planes (which also helps us avoid
re-grabbing extra plane states).

Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
 drivers/gpu/drm/i915/intel_drv.h | 4 ++++
 drivers/gpu/drm/i915/intel_pm.c  | 6 ++++--
 2 files changed, 8 insertions(+), 2 deletions(-)

Comments

Maarten Lankhorst April 21, 2016, 11:55 a.m. UTC | #1
Op 20-04-16 om 04:26 schreef Matt Roper:
> This will eventually allow us to re-use old values without
> re-calculating them for unchanged planes (which also helps us avoid
> re-grabbing extra plane states).
>
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_drv.h | 4 ++++
>  drivers/gpu/drm/i915/intel_pm.c  | 6 ++++--
>  2 files changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index e67438f..56f4cf8 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -430,6 +430,10 @@ struct intel_crtc_wm_state {
>  			/* cached plane data rate */
>  			unsigned plane_data_rate[I915_MAX_PLANES];
>  			unsigned plane_y_data_rate[I915_MAX_PLANES];
> +
> +			/* minimum block allocation */
> +			uint16_t minimum_blocks[I915_MAX_PLANES];
> +			uint16_t minimum_y_blocks[I915_MAX_PLANES];
>  		} skl;
>  	};
>  
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 39ab1cb..479a890 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3067,8 +3067,8 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
>  	enum pipe pipe = intel_crtc->pipe;
>  	struct skl_ddb_entry *alloc = &ddb->pipe[pipe];
>  	uint16_t alloc_size, start, cursor_blocks;
> -	uint16_t minimum[I915_MAX_PLANES];
> -	uint16_t y_minimum[I915_MAX_PLANES];
> +	uint16_t *minimum = cstate->wm.skl.minimum_blocks;
> +	uint16_t *y_minimum = cstate->wm.skl.minimum_y_blocks;
>  	unsigned int total_data_rate;
>  
>  	skl_ddb_get_pipe_allocation_limits(dev, cstate, config, alloc);
> @@ -3088,6 +3088,8 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
>  	alloc->end -= cursor_blocks;
>  
>  	/* 1. Allocate the mininum required blocks for each active plane */
> +	memset(minimum, 0, sizeof(uint16_t) * I915_MAX_PLANES);
> +	memset(y_minimum, 0, sizeof(uint16_t) * I915_MAX_PLANES);
The commit doesn't explain why this memset is suddenly needed, especially since this was left uninitialized before.
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index e67438f..56f4cf8 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -430,6 +430,10 @@  struct intel_crtc_wm_state {
 			/* cached plane data rate */
 			unsigned plane_data_rate[I915_MAX_PLANES];
 			unsigned plane_y_data_rate[I915_MAX_PLANES];
+
+			/* minimum block allocation */
+			uint16_t minimum_blocks[I915_MAX_PLANES];
+			uint16_t minimum_y_blocks[I915_MAX_PLANES];
 		} skl;
 	};
 
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 39ab1cb..479a890 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3067,8 +3067,8 @@  skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
 	enum pipe pipe = intel_crtc->pipe;
 	struct skl_ddb_entry *alloc = &ddb->pipe[pipe];
 	uint16_t alloc_size, start, cursor_blocks;
-	uint16_t minimum[I915_MAX_PLANES];
-	uint16_t y_minimum[I915_MAX_PLANES];
+	uint16_t *minimum = cstate->wm.skl.minimum_blocks;
+	uint16_t *y_minimum = cstate->wm.skl.minimum_y_blocks;
 	unsigned int total_data_rate;
 
 	skl_ddb_get_pipe_allocation_limits(dev, cstate, config, alloc);
@@ -3088,6 +3088,8 @@  skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
 	alloc->end -= cursor_blocks;
 
 	/* 1. Allocate the mininum required blocks for each active plane */
+	memset(minimum, 0, sizeof(uint16_t) * I915_MAX_PLANES);
+	memset(y_minimum, 0, sizeof(uint16_t) * I915_MAX_PLANES);
 	for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) {
 		struct drm_plane *plane = &intel_plane->base;
 		struct drm_framebuffer *fb = plane->state->fb;