| Message ID | 1461325946-21857-1-git-send-email-akash.goel@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Fri, Apr 22, 2016 at 05:22:24PM +0530, akash.goel@intel.com wrote: > From: Akash Goel <akash.goel@intel.com> > > Added a new GT_PM_INTERVAL_TO_US macro to perform the platform > specific conversion of PM time interval values to microseconds unit. > > Signed-off-by: Akash Goel <akash.goel@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> -Chris
On Fri, Apr 22, 2016 at 05:22:24PM +0530, akash.goel@intel.com wrote: > From: Akash Goel <akash.goel@intel.com> > > Added a new GT_PM_INTERVAL_TO_US macro to perform the platform > specific conversion of PM time interval values to microseconds unit. > > Signed-off-by: Akash Goel <akash.goel@intel.com> Note that if you submit a new series in-reply to a semirandom existing one, CI/Patchwork will not pick it up correctly. in-reply-to is just for resending individual patches in a series, as a reply to the corresponding patch in the original one. If you add/remove/change the numbers of patches, it needs to be a new one. -Daniel > --- > drivers/gpu/drm/i915/i915_reg.h | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index 9464ba3..eacd9ae 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -2939,6 +2939,15 @@ enum skl_disp_power_wells { > INTERVAL_1_33_US(us)) : \ > INTERVAL_1_28_US(us)) > > +#define INTERVAL_1_28_TO_US(interval) (((interval) << 7) / 100) > +#define INTERVAL_1_33_TO_US(interval) (((interval) << 2) / 3) > +#define INTERVAL_0_833_TO_US(interval) (((interval) * 5) / 6) > +#define GT_PM_INTERVAL_TO_US(dev_priv, interval) (IS_GEN9(dev_priv) ? \ > + (IS_BROXTON(dev_priv) ? \ > + INTERVAL_0_833_TO_US(interval) : \ > + INTERVAL_1_33_TO_US(interval)) : \ > + INTERVAL_1_28_TO_US(interval)) > + > /* > * Logical Context regs > */ > -- > 1.9.2 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 9464ba3..eacd9ae 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -2939,6 +2939,15 @@ enum skl_disp_power_wells { INTERVAL_1_33_US(us)) : \ INTERVAL_1_28_US(us)) +#define INTERVAL_1_28_TO_US(interval) (((interval) << 7) / 100) +#define INTERVAL_1_33_TO_US(interval) (((interval) << 2) / 3) +#define INTERVAL_0_833_TO_US(interval) (((interval) * 5) / 6) +#define GT_PM_INTERVAL_TO_US(dev_priv, interval) (IS_GEN9(dev_priv) ? \ + (IS_BROXTON(dev_priv) ? \ + INTERVAL_0_833_TO_US(interval) : \ + INTERVAL_1_33_TO_US(interval)) : \ + INTERVAL_1_28_TO_US(interval)) + /* * Logical Context regs */