| Message ID | 1462734367-5619-20-git-send-email-krzk@kernel.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Hello Krzysztof, On 05/08/2016 03:06 PM, Krzysztof Kozlowski wrote: > Multi-Core Timer generates interrupts but it is not really an interrupt > controller so remove the "interrupt-controller" and "interrupt-cells" > properties. Additionally extend the length of mapped memory to cover all > registers (last SFR is at 0x0A40). > > Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> > --- Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Best regards,
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index 3114cd6fb5d1..ac39e3b8b0e1 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -267,9 +267,7 @@ mct: mct@101C0000 { compatible = "samsung,exynos4210-mct"; - reg = <0x101C0000 0x800>; - interrupt-controller; - #interrupt-cells = <1>; + reg = <0x101C0000 0xB00>; interrupt-parent = <&mct_map>; interrupts = <0>, <1>, <2>, <3>, <4>, <5>, <6>, <7>, <8>, <9>, <10>, <11>;
Multi-Core Timer generates interrupts but it is not really an interrupt controller so remove the "interrupt-controller" and "interrupt-cells" properties. Additionally extend the length of mapped memory to cover all registers (last SFR is at 0x0A40). Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> --- arch/arm/boot/dts/exynos5420.dtsi | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-)