diff mbox

x86/cpuid: Avoid unconditionally clobbering ITSC for guests

Message ID 1463417955-4258-1-git-send-email-andrew.cooper3@citrix.com (mailing list archive)
State New, archived
Headers show

Commit Message

Andrew Cooper May 16, 2016, 4:59 p.m. UTC
In general, Invariant TSC is not a feature which can be advertised to guests,
because it cannot be guaranteed across migrate.  domain_cpuid() goes so far as
to deliberately clobber the feature flag under a number of circumstances.

Because ITSC is absent from the static {pv,hvm}_featureset masks, c/s b648feff
"xen/x86: Improvements to in-hypervisor cpuid sanity checks" caused ITSC to be
unconditionally masked out.

As an interim solution, include the hosts idea of ITSC along with the static
{pv,hvm}_featureset when restricting the guests view of features.  This causes
the hardware domain, and VMs explicitly configured with ITSC and no-migrate to
be offered ITSC (subject to hardware availability).

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
CC: Jan Beulich <JBeulich@suse.com>
CC: Wei Liu <wei.liu2@citrix.com>
---
 xen/arch/x86/hvm/hvm.c | 3 ++-
 xen/arch/x86/traps.c   | 3 ++-
 2 files changed, 4 insertions(+), 2 deletions(-)

Comments

Jan Beulich May 17, 2016, 8:39 a.m. UTC | #1
>>> On 16.05.16 at 18:59, <andrew.cooper3@citrix.com> wrote:
> In general, Invariant TSC is not a feature which can be advertised to guests,
> because it cannot be guaranteed across migrate.  domain_cpuid() goes so far as
> to deliberately clobber the feature flag under a number of circumstances.
> 
> Because ITSC is absent from the static {pv,hvm}_featureset masks, c/s b648feff
> "xen/x86: Improvements to in-hypervisor cpuid sanity checks" caused ITSC to be
> unconditionally masked out.
> 
> As an interim solution, include the hosts idea of ITSC along with the static
> {pv,hvm}_featureset when restricting the guests view of features.  This causes
> the hardware domain, and VMs explicitly configured with ITSC and no-migrate to
> be offered ITSC (subject to hardware availability).
> 
> Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>

Reviewed-by: Jan Beulich <jbeulich@suse.com>
Wei Liu May 17, 2016, 1:12 p.m. UTC | #2
On Mon, May 16, 2016 at 05:59:15PM +0100, Andrew Cooper wrote:
> In general, Invariant TSC is not a feature which can be advertised to guests,
> because it cannot be guaranteed across migrate.  domain_cpuid() goes so far as
> to deliberately clobber the feature flag under a number of circumstances.
> 
> Because ITSC is absent from the static {pv,hvm}_featureset masks, c/s b648feff
> "xen/x86: Improvements to in-hypervisor cpuid sanity checks" caused ITSC to be
> unconditionally masked out.
> 
> As an interim solution, include the hosts idea of ITSC along with the static
> {pv,hvm}_featureset when restricting the guests view of features.  This causes
> the hardware domain, and VMs explicitly configured with ITSC and no-migrate to
> be offered ITSC (subject to hardware availability).
> 
> Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>

Release-acked-by: Wei Liu <wei.liu2@citrix.com>
diff mbox

Patch

diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c
index 7492030..5040a5c 100644
--- a/xen/arch/x86/hvm/hvm.c
+++ b/xen/arch/x86/hvm/hvm.c
@@ -3509,7 +3509,8 @@  void hvm_cpuid(unsigned int input, unsigned int *eax, unsigned int *ebx,
         break;
 
     case 0x80000007:
-        *edx &= hvm_featureset[FEATURESET_e7d];
+        *edx &= (hvm_featureset[FEATURESET_e7d] |
+                 (host_featureset[FEATURESET_e7d] & cpufeat_mask(X86_FEATURE_ITSC)));
         break;
 
     case 0x80000008:
diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c
index 0052ab8..1ef8401 100644
--- a/xen/arch/x86/traps.c
+++ b/xen/arch/x86/traps.c
@@ -1142,7 +1142,8 @@  void pv_cpuid(struct cpu_user_regs *regs)
         break;
 
     case 0x80000007:
-        d &= pv_featureset[FEATURESET_e7d];
+        d &= (pv_featureset[FEATURESET_e7d] |
+              (host_featureset[FEATURESET_e7d] & cpufeat_mask(X86_FEATURE_ITSC)));
         break;
 
     case 0x80000008: