| Message ID | 1462776680-5284-2-git-send-email-wenyou.yang@atmel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Hi Wenyou, Can you add NAND maintainers/reviewers in Cc next time. And since you revert a commit, you should also add the commit author in the loop. On Mon, 9 May 2016 14:51:18 +0800 Wenyou Yang <wenyou.yang@atmel.com> wrote: > This reverts commit 5ddc7bd43ccc ("mtd: atmel_nand: Support variable > RB_EDGE interrupts") > > Because for current SoCs, the RB_EDGE3(i.e. bit 27) of HSMC_SR > register does not exist, the RB_EDGE0 (i.e. bit 24) is the ready/busy > line edge status bit. It is a datasheet bug. Romain, I thought you had a real use case on sama5d4 where this patch was needed to make the whole thing work. Not sure why you submitted this patch if you couldn't test it on a real board. Wenyou, can you confirm that none of the existing SoCs support more than one "native" R/B pin? Thanks, Boris > > Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> > --- > > .../devicetree/bindings/mtd/atmel-nand.txt | 2 +- > drivers/mtd/nand/atmel_nand.c | 35 +++++----------------- > drivers/mtd/nand/atmel_nand_nfc.h | 3 +- > 3 files changed, 10 insertions(+), 30 deletions(-) > > diff --git a/Documentation/devicetree/bindings/mtd/atmel-nand.txt b/Documentation/devicetree/bindings/mtd/atmel-nand.txt > index d53aba9..3e7ee99 100644 > --- a/Documentation/devicetree/bindings/mtd/atmel-nand.txt > +++ b/Documentation/devicetree/bindings/mtd/atmel-nand.txt > @@ -39,7 +39,7 @@ Optional properties: > > Nand Flash Controller(NFC) is an optional sub-node > Required properties: > -- compatible : "atmel,sama5d3-nfc" or "atmel,sama5d4-nfc". > +- compatible : "atmel,sama5d3-nfc". > - reg : should specify the address and size used for NFC command registers, > NFC registers and NFC SRAM. NFC SRAM address and size can be absent > if don't want to use it. > diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c > index efc8ea2..68b9160 100644 > --- a/drivers/mtd/nand/atmel_nand.c > +++ b/drivers/mtd/nand/atmel_nand.c > @@ -67,10 +67,6 @@ struct atmel_nand_caps { > uint8_t pmecc_max_correction; > }; > > -struct atmel_nand_nfc_caps { > - uint32_t rb_mask; > -}; > - > /* > * oob layout for large page size > * bad block info is on bytes 0 and 1 > @@ -129,7 +125,6 @@ struct atmel_nfc { > /* Point to the sram bank which include readed data via NFC */ > void *data_in_sram; > bool will_write_sram; > - const struct atmel_nand_nfc_caps *caps; > }; > static struct atmel_nfc nand_nfc; > > @@ -1715,9 +1710,9 @@ static irqreturn_t hsmc_interrupt(int irq, void *dev_id) > nfc_writel(host->nfc->hsmc_regs, IDR, NFC_SR_XFR_DONE); > ret = IRQ_HANDLED; > } > - if (pending & host->nfc->caps->rb_mask) { > + if (pending & NFC_SR_RB_EDGE) { > complete(&host->nfc->comp_ready); > - nfc_writel(host->nfc->hsmc_regs, IDR, host->nfc->caps->rb_mask); > + nfc_writel(host->nfc->hsmc_regs, IDR, NFC_SR_RB_EDGE); > ret = IRQ_HANDLED; > } > if (pending & NFC_SR_CMD_DONE) { > @@ -1735,7 +1730,7 @@ static void nfc_prepare_interrupt(struct atmel_nand_host *host, u32 flag) > if (flag & NFC_SR_XFR_DONE) > init_completion(&host->nfc->comp_xfer_done); > > - if (flag & host->nfc->caps->rb_mask) > + if (flag & NFC_SR_RB_EDGE) > init_completion(&host->nfc->comp_ready); > > if (flag & NFC_SR_CMD_DONE) > @@ -1753,7 +1748,7 @@ static int nfc_wait_interrupt(struct atmel_nand_host *host, u32 flag) > if (flag & NFC_SR_XFR_DONE) > comp[index++] = &host->nfc->comp_xfer_done; > > - if (flag & host->nfc->caps->rb_mask) > + if (flag & NFC_SR_RB_EDGE) > comp[index++] = &host->nfc->comp_ready; > > if (flag & NFC_SR_CMD_DONE) > @@ -1821,7 +1816,7 @@ static int nfc_device_ready(struct mtd_info *mtd) > dev_err(host->dev, "Lost the interrupt flags: 0x%08x\n", > mask & status); > > - return status & host->nfc->caps->rb_mask; > + return status & NFC_SR_RB_EDGE; > } > > static void nfc_select_chip(struct mtd_info *mtd, int chip) > @@ -1994,8 +1989,8 @@ static void nfc_nand_command(struct mtd_info *mtd, unsigned int command, > } > /* fall through */ > default: > - nfc_prepare_interrupt(host, host->nfc->caps->rb_mask); > - nfc_wait_interrupt(host, host->nfc->caps->rb_mask); > + nfc_prepare_interrupt(host, NFC_SR_RB_EDGE); > + nfc_wait_interrupt(host, NFC_SR_RB_EDGE); > } > } > > @@ -2426,11 +2421,6 @@ static int atmel_nand_nfc_probe(struct platform_device *pdev) > } > } > > - nfc->caps = (const struct atmel_nand_nfc_caps *) > - of_device_get_match_data(&pdev->dev); > - if (!nfc->caps) > - return -ENODEV; > - > nfc_writel(nfc->hsmc_regs, IDR, 0xffffffff); > nfc_readl(nfc->hsmc_regs, SR); /* clear the NFC_SR */ > > @@ -2459,17 +2449,8 @@ static int atmel_nand_nfc_remove(struct platform_device *pdev) > return 0; > } > > -static const struct atmel_nand_nfc_caps sama5d3_nfc_caps = { > - .rb_mask = NFC_SR_RB_EDGE0, > -}; > - > -static const struct atmel_nand_nfc_caps sama5d4_nfc_caps = { > - .rb_mask = NFC_SR_RB_EDGE3, > -}; > - > static const struct of_device_id atmel_nand_nfc_match[] = { > - { .compatible = "atmel,sama5d3-nfc", .data = &sama5d3_nfc_caps }, > - { .compatible = "atmel,sama5d4-nfc", .data = &sama5d4_nfc_caps }, > + { .compatible = "atmel,sama5d3-nfc" }, > { /* sentinel */ } > }; > MODULE_DEVICE_TABLE(of, atmel_nand_nfc_match); > diff --git a/drivers/mtd/nand/atmel_nand_nfc.h b/drivers/mtd/nand/atmel_nand_nfc.h > index 0bbc1fa..4d5d262 100644 > --- a/drivers/mtd/nand/atmel_nand_nfc.h > +++ b/drivers/mtd/nand/atmel_nand_nfc.h > @@ -42,8 +42,7 @@ > #define NFC_SR_UNDEF (1 << 21) > #define NFC_SR_AWB (1 << 22) > #define NFC_SR_ASE (1 << 23) > -#define NFC_SR_RB_EDGE0 (1 << 24) > -#define NFC_SR_RB_EDGE3 (1 << 27) > +#define NFC_SR_RB_EDGE (1 << 24) > > #define ATMEL_HSMC_NFC_IER 0x0c > #define ATMEL_HSMC_NFC_IDR 0x10
> -----Original Message----- > From: Boris Brezillon [mailto:boris.brezillon@free-electrons.com] > Sent: 2016?5?10? 16:56 > To: Yang, Wenyou <Wenyou.Yang@atmel.com>; Romain Izard > <romain.izard.pro@gmail.com> > Cc: Brian Norris <computersforpeace@gmail.com>; David Woodhouse > <dwmw2@infradead.org>; Rob Herring <robh+dt@kernel.org>; Pawel Moll > <pawel.moll@arm.com>; Mark Brown <broonie@kernel.org>; Ian Campbell > <ijc+devicetree@hellion.org.uk>; Kumar Gala <galak@codeaurora.org>; > devicetree@vger.kernel.org; Russell King <linux@arm.linux.org.uk>; Josh Wu > <rainyfeeling@outlook.com>; Ferre, Nicolas <Nicolas.FERRE@atmel.com>; > linux-kernel@vger.kernel.org; Alexandre Belloni <alexandre.belloni@free- > electrons.com>; linux-mtd@lists.infradead.org; Jean-Christophe Plagniol-Villard > <plagnioj@jcrosoft.com>; linux-arm-kernel@lists.infradead.org > Subject: Re: [PATCH 1/2] Revert "mtd: atmel_nand: Support variable RB_EDGE > interrupts" > > Hi Wenyou, > > Can you add NAND maintainers/reviewers in Cc next time. And since you revert a > commit, you should also add the commit author in the loop. > > On Mon, 9 May 2016 14:51:18 +0800 > Wenyou Yang <wenyou.yang@atmel.com> wrote: > > > This reverts commit 5ddc7bd43ccc ("mtd: atmel_nand: Support variable > > RB_EDGE interrupts") > > > > Because for current SoCs, the RB_EDGE3(i.e. bit 27) of HSMC_SR > > register does not exist, the RB_EDGE0 (i.e. bit 24) is the ready/busy > > line edge status bit. It is a datasheet bug. > > Romain, I thought you had a real use case on sama5d4 where this patch was > needed to make the whole thing work. Not sure why you submitted this patch if > you couldn't test it on a real board. > > Wenyou, can you confirm that none of the existing SoCs support more than one > "native" R/B pin? Yes, I confirmed. > > Thanks, > > Boris > > > > > Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> > > --- > > > > .../devicetree/bindings/mtd/atmel-nand.txt | 2 +- > > drivers/mtd/nand/atmel_nand.c | 35 +++++----------------- > > drivers/mtd/nand/atmel_nand_nfc.h | 3 +- > > 3 files changed, 10 insertions(+), 30 deletions(-) > > > > diff --git a/Documentation/devicetree/bindings/mtd/atmel-nand.txt > > b/Documentation/devicetree/bindings/mtd/atmel-nand.txt > > index d53aba9..3e7ee99 100644 > > --- a/Documentation/devicetree/bindings/mtd/atmel-nand.txt > > +++ b/Documentation/devicetree/bindings/mtd/atmel-nand.txt > > @@ -39,7 +39,7 @@ Optional properties: > > > > Nand Flash Controller(NFC) is an optional sub-node Required > > properties: > > -- compatible : "atmel,sama5d3-nfc" or "atmel,sama5d4-nfc". > > +- compatible : "atmel,sama5d3-nfc". > > - reg : should specify the address and size used for NFC command registers, > > NFC registers and NFC SRAM. NFC SRAM address and size can be > absent > > if don't want to use it. > > diff --git a/drivers/mtd/nand/atmel_nand.c > > b/drivers/mtd/nand/atmel_nand.c index efc8ea2..68b9160 100644 > > --- a/drivers/mtd/nand/atmel_nand.c > > +++ b/drivers/mtd/nand/atmel_nand.c > > @@ -67,10 +67,6 @@ struct atmel_nand_caps { > > uint8_t pmecc_max_correction; > > }; > > > > -struct atmel_nand_nfc_caps { > > - uint32_t rb_mask; > > -}; > > - > > /* > > * oob layout for large page size > > * bad block info is on bytes 0 and 1 @@ -129,7 +125,6 @@ struct > > atmel_nfc { > > /* Point to the sram bank which include readed data via NFC */ > > void *data_in_sram; > > bool will_write_sram; > > - const struct atmel_nand_nfc_caps *caps; > > }; > > static struct atmel_nfc nand_nfc; > > > > @@ -1715,9 +1710,9 @@ static irqreturn_t hsmc_interrupt(int irq, void *dev_id) > > nfc_writel(host->nfc->hsmc_regs, IDR, NFC_SR_XFR_DONE); > > ret = IRQ_HANDLED; > > } > > - if (pending & host->nfc->caps->rb_mask) { > > + if (pending & NFC_SR_RB_EDGE) { > > complete(&host->nfc->comp_ready); > > - nfc_writel(host->nfc->hsmc_regs, IDR, host->nfc->caps- > >rb_mask); > > + nfc_writel(host->nfc->hsmc_regs, IDR, NFC_SR_RB_EDGE); > > ret = IRQ_HANDLED; > > } > > if (pending & NFC_SR_CMD_DONE) { > > @@ -1735,7 +1730,7 @@ static void nfc_prepare_interrupt(struct > atmel_nand_host *host, u32 flag) > > if (flag & NFC_SR_XFR_DONE) > > init_completion(&host->nfc->comp_xfer_done); > > > > - if (flag & host->nfc->caps->rb_mask) > > + if (flag & NFC_SR_RB_EDGE) > > init_completion(&host->nfc->comp_ready); > > > > if (flag & NFC_SR_CMD_DONE) > > @@ -1753,7 +1748,7 @@ static int nfc_wait_interrupt(struct atmel_nand_host > *host, u32 flag) > > if (flag & NFC_SR_XFR_DONE) > > comp[index++] = &host->nfc->comp_xfer_done; > > > > - if (flag & host->nfc->caps->rb_mask) > > + if (flag & NFC_SR_RB_EDGE) > > comp[index++] = &host->nfc->comp_ready; > > > > if (flag & NFC_SR_CMD_DONE) > > @@ -1821,7 +1816,7 @@ static int nfc_device_ready(struct mtd_info *mtd) > > dev_err(host->dev, "Lost the interrupt flags: 0x%08x\n", > > mask & status); > > > > - return status & host->nfc->caps->rb_mask; > > + return status & NFC_SR_RB_EDGE; > > } > > > > static void nfc_select_chip(struct mtd_info *mtd, int chip) @@ > > -1994,8 +1989,8 @@ static void nfc_nand_command(struct mtd_info *mtd, > unsigned int command, > > } > > /* fall through */ > > default: > > - nfc_prepare_interrupt(host, host->nfc->caps->rb_mask); > > - nfc_wait_interrupt(host, host->nfc->caps->rb_mask); > > + nfc_prepare_interrupt(host, NFC_SR_RB_EDGE); > > + nfc_wait_interrupt(host, NFC_SR_RB_EDGE); > > } > > } > > > > @@ -2426,11 +2421,6 @@ static int atmel_nand_nfc_probe(struct > platform_device *pdev) > > } > > } > > > > - nfc->caps = (const struct atmel_nand_nfc_caps *) > > - of_device_get_match_data(&pdev->dev); > > - if (!nfc->caps) > > - return -ENODEV; > > - > > nfc_writel(nfc->hsmc_regs, IDR, 0xffffffff); > > nfc_readl(nfc->hsmc_regs, SR); /* clear the NFC_SR */ > > > > @@ -2459,17 +2449,8 @@ static int atmel_nand_nfc_remove(struct > platform_device *pdev) > > return 0; > > } > > > > -static const struct atmel_nand_nfc_caps sama5d3_nfc_caps = { > > - .rb_mask = NFC_SR_RB_EDGE0, > > -}; > > - > > -static const struct atmel_nand_nfc_caps sama5d4_nfc_caps = { > > - .rb_mask = NFC_SR_RB_EDGE3, > > -}; > > - > > static const struct of_device_id atmel_nand_nfc_match[] = { > > - { .compatible = "atmel,sama5d3-nfc", .data = &sama5d3_nfc_caps }, > > - { .compatible = "atmel,sama5d4-nfc", .data = &sama5d4_nfc_caps }, > > + { .compatible = "atmel,sama5d3-nfc" }, > > { /* sentinel */ } > > }; > > MODULE_DEVICE_TABLE(of, atmel_nand_nfc_match); diff --git > > a/drivers/mtd/nand/atmel_nand_nfc.h > > b/drivers/mtd/nand/atmel_nand_nfc.h > > index 0bbc1fa..4d5d262 100644 > > --- a/drivers/mtd/nand/atmel_nand_nfc.h > > +++ b/drivers/mtd/nand/atmel_nand_nfc.h > > @@ -42,8 +42,7 @@ > > #define NFC_SR_UNDEF (1 << 21) > > #define NFC_SR_AWB (1 << 22) > > #define NFC_SR_ASE (1 << 23) > > -#define NFC_SR_RB_EDGE0 (1 << 24) > > -#define NFC_SR_RB_EDGE3 (1 << 27) > > +#define NFC_SR_RB_EDGE (1 << 24) > > > > #define ATMEL_HSMC_NFC_IER 0x0c > > #define ATMEL_HSMC_NFC_IDR 0x10 > > > > -- > Boris Brezillon, Free Electrons > Embedded Linux and Kernel engineering > http://free-electrons.com Best Regards, Wenyou Yang
Hi Boris, 2016-05-10 10:55 GMT+02:00 Boris Brezillon <boris.brezillon@free-electrons.com>: > > Romain, I thought you had a real use case on sama5d4 where this patch > was needed to make the whole thing work. Not sure why you submitted > this patch if you couldn't test it on a real board. My target CPU is SAMA5D2, but I chose the SAMA5D4 for the compatible string as it was the earliest design whose datasheet mentioned the RB_EDGE3 bit. I wrote the SAMA5D2 support in advance, as I was waiting for my board to be ready, basing myself on what was found in the datasheet. The changes included both the variable RB_EDGE support, and the PMECC register layout changes, which were a prerequisite to use the SAMA5D2 NAND controller. I tested the code against regressions on sama5d3xek, and Wenyou reported that he tested it on Atmel's SAMA5D2 PTC, which was the only existing board at that time with both a SAMA5D2 SoC and a NAND chip. Unfortunately, as the bug is only seen when writing on the flash, and it only affects the speed of the device, he did not notice it. I sent the patches early because I expected the submission process to be long, and I wanted to be able to freeze the kernel version to be used on my board as soon as possible. Best regards,
On Mon, 9 May 2016 14:51:18 +0800 Wenyou Yang <wenyou.yang@atmel.com> wrote: > This reverts commit 5ddc7bd43ccc ("mtd: atmel_nand: Support variable > RB_EDGE interrupts") > > Because for current SoCs, the RB_EDGE3(i.e. bit 27) of HSMC_SR > register does not exist, the RB_EDGE0 (i.e. bit 24) is the ready/busy > line edge status bit. It is a datasheet bug. > > Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Wenyou, I know you sent it before v4.6 was released, but now we should probably add Cc: <stable@vger.kernel.org> Brian, can you apply this patch directly in your tree (as previously discussed, I'm not sure creating a nand/fixes branch is really useful)? Thanks, Boris > --- > > .../devicetree/bindings/mtd/atmel-nand.txt | 2 +- > drivers/mtd/nand/atmel_nand.c | 35 +++++----------------- > drivers/mtd/nand/atmel_nand_nfc.h | 3 +- > 3 files changed, 10 insertions(+), 30 deletions(-) > > diff --git a/Documentation/devicetree/bindings/mtd/atmel-nand.txt b/Documentation/devicetree/bindings/mtd/atmel-nand.txt > index d53aba9..3e7ee99 100644 > --- a/Documentation/devicetree/bindings/mtd/atmel-nand.txt > +++ b/Documentation/devicetree/bindings/mtd/atmel-nand.txt > @@ -39,7 +39,7 @@ Optional properties: > > Nand Flash Controller(NFC) is an optional sub-node > Required properties: > -- compatible : "atmel,sama5d3-nfc" or "atmel,sama5d4-nfc". > +- compatible : "atmel,sama5d3-nfc". > - reg : should specify the address and size used for NFC command registers, > NFC registers and NFC SRAM. NFC SRAM address and size can be absent > if don't want to use it. > diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c > index efc8ea2..68b9160 100644 > --- a/drivers/mtd/nand/atmel_nand.c > +++ b/drivers/mtd/nand/atmel_nand.c > @@ -67,10 +67,6 @@ struct atmel_nand_caps { > uint8_t pmecc_max_correction; > }; > > -struct atmel_nand_nfc_caps { > - uint32_t rb_mask; > -}; > - > /* > * oob layout for large page size > * bad block info is on bytes 0 and 1 > @@ -129,7 +125,6 @@ struct atmel_nfc { > /* Point to the sram bank which include readed data via NFC */ > void *data_in_sram; > bool will_write_sram; > - const struct atmel_nand_nfc_caps *caps; > }; > static struct atmel_nfc nand_nfc; > > @@ -1715,9 +1710,9 @@ static irqreturn_t hsmc_interrupt(int irq, void *dev_id) > nfc_writel(host->nfc->hsmc_regs, IDR, NFC_SR_XFR_DONE); > ret = IRQ_HANDLED; > } > - if (pending & host->nfc->caps->rb_mask) { > + if (pending & NFC_SR_RB_EDGE) { > complete(&host->nfc->comp_ready); > - nfc_writel(host->nfc->hsmc_regs, IDR, host->nfc->caps->rb_mask); > + nfc_writel(host->nfc->hsmc_regs, IDR, NFC_SR_RB_EDGE); > ret = IRQ_HANDLED; > } > if (pending & NFC_SR_CMD_DONE) { > @@ -1735,7 +1730,7 @@ static void nfc_prepare_interrupt(struct atmel_nand_host *host, u32 flag) > if (flag & NFC_SR_XFR_DONE) > init_completion(&host->nfc->comp_xfer_done); > > - if (flag & host->nfc->caps->rb_mask) > + if (flag & NFC_SR_RB_EDGE) > init_completion(&host->nfc->comp_ready); > > if (flag & NFC_SR_CMD_DONE) > @@ -1753,7 +1748,7 @@ static int nfc_wait_interrupt(struct atmel_nand_host *host, u32 flag) > if (flag & NFC_SR_XFR_DONE) > comp[index++] = &host->nfc->comp_xfer_done; > > - if (flag & host->nfc->caps->rb_mask) > + if (flag & NFC_SR_RB_EDGE) > comp[index++] = &host->nfc->comp_ready; > > if (flag & NFC_SR_CMD_DONE) > @@ -1821,7 +1816,7 @@ static int nfc_device_ready(struct mtd_info *mtd) > dev_err(host->dev, "Lost the interrupt flags: 0x%08x\n", > mask & status); > > - return status & host->nfc->caps->rb_mask; > + return status & NFC_SR_RB_EDGE; > } > > static void nfc_select_chip(struct mtd_info *mtd, int chip) > @@ -1994,8 +1989,8 @@ static void nfc_nand_command(struct mtd_info *mtd, unsigned int command, > } > /* fall through */ > default: > - nfc_prepare_interrupt(host, host->nfc->caps->rb_mask); > - nfc_wait_interrupt(host, host->nfc->caps->rb_mask); > + nfc_prepare_interrupt(host, NFC_SR_RB_EDGE); > + nfc_wait_interrupt(host, NFC_SR_RB_EDGE); > } > } > > @@ -2426,11 +2421,6 @@ static int atmel_nand_nfc_probe(struct platform_device *pdev) > } > } > > - nfc->caps = (const struct atmel_nand_nfc_caps *) > - of_device_get_match_data(&pdev->dev); > - if (!nfc->caps) > - return -ENODEV; > - > nfc_writel(nfc->hsmc_regs, IDR, 0xffffffff); > nfc_readl(nfc->hsmc_regs, SR); /* clear the NFC_SR */ > > @@ -2459,17 +2449,8 @@ static int atmel_nand_nfc_remove(struct platform_device *pdev) > return 0; > } > > -static const struct atmel_nand_nfc_caps sama5d3_nfc_caps = { > - .rb_mask = NFC_SR_RB_EDGE0, > -}; > - > -static const struct atmel_nand_nfc_caps sama5d4_nfc_caps = { > - .rb_mask = NFC_SR_RB_EDGE3, > -}; > - > static const struct of_device_id atmel_nand_nfc_match[] = { > - { .compatible = "atmel,sama5d3-nfc", .data = &sama5d3_nfc_caps }, > - { .compatible = "atmel,sama5d4-nfc", .data = &sama5d4_nfc_caps }, > + { .compatible = "atmel,sama5d3-nfc" }, > { /* sentinel */ } > }; > MODULE_DEVICE_TABLE(of, atmel_nand_nfc_match); > diff --git a/drivers/mtd/nand/atmel_nand_nfc.h b/drivers/mtd/nand/atmel_nand_nfc.h > index 0bbc1fa..4d5d262 100644 > --- a/drivers/mtd/nand/atmel_nand_nfc.h > +++ b/drivers/mtd/nand/atmel_nand_nfc.h > @@ -42,8 +42,7 @@ > #define NFC_SR_UNDEF (1 << 21) > #define NFC_SR_AWB (1 << 22) > #define NFC_SR_ASE (1 << 23) > -#define NFC_SR_RB_EDGE0 (1 << 24) > -#define NFC_SR_RB_EDGE3 (1 << 27) > +#define NFC_SR_RB_EDGE (1 << 24) > > #define ATMEL_HSMC_NFC_IER 0x0c > #define ATMEL_HSMC_NFC_IDR 0x10
Hi, On Mon, May 23, 2016 at 09:55:57AM +0200, Boris Brezillon wrote: > On Mon, 9 May 2016 14:51:18 +0800 > Wenyou Yang <wenyou.yang@atmel.com> wrote: > > > This reverts commit 5ddc7bd43ccc ("mtd: atmel_nand: Support variable > > RB_EDGE interrupts") > > > > Because for current SoCs, the RB_EDGE3(i.e. bit 27) of HSMC_SR > > register does not exist, the RB_EDGE0 (i.e. bit 24) is the ready/busy > > line edge status bit. It is a datasheet bug. > > > > Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> > > Wenyou, I know you sent it before v4.6 was released, but now we should > probably add Sorry for the delay... > Cc: <stable@vger.kernel.org> Added that and a Fixes: tag. > Brian, can you apply this patch directly in your tree (as previously > discussed, I'm not sure creating a nand/fixes branch is really useful)? Pushed to linux-mtd.git. I'll probably send it to Linus in the next day or two. Brian
Hi, On Mon, May 09, 2016 at 02:51:18PM +0800, Wenyou Yang wrote: > This reverts commit 5ddc7bd43ccc ("mtd: atmel_nand: Support variable > RB_EDGE interrupts") > > Because for current SoCs, the RB_EDGE3(i.e. bit 27) of HSMC_SR > register does not exist, the RB_EDGE0 (i.e. bit 24) is the ready/busy > line edge status bit. It is a datasheet bug. > > Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> > --- > > .../devicetree/bindings/mtd/atmel-nand.txt | 2 +- > drivers/mtd/nand/atmel_nand.c | 35 +++++----------------- > drivers/mtd/nand/atmel_nand_nfc.h | 3 +- > 3 files changed, 10 insertions(+), 30 deletions(-) > > diff --git a/Documentation/devicetree/bindings/mtd/atmel-nand.txt b/Documentation/devicetree/bindings/mtd/atmel-nand.txt > index d53aba9..3e7ee99 100644 > --- a/Documentation/devicetree/bindings/mtd/atmel-nand.txt > +++ b/Documentation/devicetree/bindings/mtd/atmel-nand.txt > @@ -39,7 +39,7 @@ Optional properties: > > Nand Flash Controller(NFC) is an optional sub-node > Required properties: > -- compatible : "atmel,sama5d3-nfc" or "atmel,sama5d4-nfc". > +- compatible : "atmel,sama5d3-nfc". > - reg : should specify the address and size used for NFC command registers, > NFC registers and NFC SRAM. NFC SRAM address and size can be absent > if don't want to use it. > diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c > index efc8ea2..68b9160 100644 > --- a/drivers/mtd/nand/atmel_nand.c > +++ b/drivers/mtd/nand/atmel_nand.c [...] > static const struct of_device_id atmel_nand_nfc_match[] = { > - { .compatible = "atmel,sama5d3-nfc", .data = &sama5d3_nfc_caps }, > - { .compatible = "atmel,sama5d4-nfc", .data = &sama5d4_nfc_caps }, > + { .compatible = "atmel,sama5d3-nfc" }, Hmm, wait. Didn't Rob and Alexandre suggest that we should *not* drop the compatible property? We could have easily supported both here, and just not listed any different capabilities. But I see that Nicholas took the patch anyway, so I guess it's not a big deal... > { /* sentinel */ } > }; > MODULE_DEVICE_TABLE(of, atmel_nand_nfc_match); Brian
On Wed, 25 May 2016 20:16:54 -0700 Brian Norris <computersforpeace@gmail.com> wrote: > Hi, > > On Mon, May 09, 2016 at 02:51:18PM +0800, Wenyou Yang wrote: > > This reverts commit 5ddc7bd43ccc ("mtd: atmel_nand: Support variable > > RB_EDGE interrupts") > > > > Because for current SoCs, the RB_EDGE3(i.e. bit 27) of HSMC_SR > > register does not exist, the RB_EDGE0 (i.e. bit 24) is the ready/busy > > line edge status bit. It is a datasheet bug. > > > > Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> > > --- > > > > .../devicetree/bindings/mtd/atmel-nand.txt | 2 +- > > drivers/mtd/nand/atmel_nand.c | 35 +++++----------------- > > drivers/mtd/nand/atmel_nand_nfc.h | 3 +- > > 3 files changed, 10 insertions(+), 30 deletions(-) > > > > diff --git a/Documentation/devicetree/bindings/mtd/atmel-nand.txt b/Documentation/devicetree/bindings/mtd/atmel-nand.txt > > index d53aba9..3e7ee99 100644 > > --- a/Documentation/devicetree/bindings/mtd/atmel-nand.txt > > +++ b/Documentation/devicetree/bindings/mtd/atmel-nand.txt > > @@ -39,7 +39,7 @@ Optional properties: > > > > Nand Flash Controller(NFC) is an optional sub-node > > Required properties: > > -- compatible : "atmel,sama5d3-nfc" or "atmel,sama5d4-nfc". > > +- compatible : "atmel,sama5d3-nfc". > > - reg : should specify the address and size used for NFC command registers, > > NFC registers and NFC SRAM. NFC SRAM address and size can be absent > > if don't want to use it. > > diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c > > index efc8ea2..68b9160 100644 > > --- a/drivers/mtd/nand/atmel_nand.c > > +++ b/drivers/mtd/nand/atmel_nand.c > [...] > > static const struct of_device_id atmel_nand_nfc_match[] = { > > - { .compatible = "atmel,sama5d3-nfc", .data = &sama5d3_nfc_caps }, > > - { .compatible = "atmel,sama5d4-nfc", .data = &sama5d4_nfc_caps }, > > + { .compatible = "atmel,sama5d3-nfc" }, > > Hmm, wait. Didn't Rob and Alexandre suggest that we should *not* drop > the compatible property? We could have easily supported both here, and > just not listed any different capabilities. But I see that Nicholas took > the patch anyway, so I guess it's not a big deal... Yes, actually the compatible change was introduced and fixed in the same release, so I don't think the stable ABI argument stands here.
diff --git a/Documentation/devicetree/bindings/mtd/atmel-nand.txt b/Documentation/devicetree/bindings/mtd/atmel-nand.txt index d53aba9..3e7ee99 100644 --- a/Documentation/devicetree/bindings/mtd/atmel-nand.txt +++ b/Documentation/devicetree/bindings/mtd/atmel-nand.txt @@ -39,7 +39,7 @@ Optional properties: Nand Flash Controller(NFC) is an optional sub-node Required properties: -- compatible : "atmel,sama5d3-nfc" or "atmel,sama5d4-nfc". +- compatible : "atmel,sama5d3-nfc". - reg : should specify the address and size used for NFC command registers, NFC registers and NFC SRAM. NFC SRAM address and size can be absent if don't want to use it. diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c index efc8ea2..68b9160 100644 --- a/drivers/mtd/nand/atmel_nand.c +++ b/drivers/mtd/nand/atmel_nand.c @@ -67,10 +67,6 @@ struct atmel_nand_caps { uint8_t pmecc_max_correction; }; -struct atmel_nand_nfc_caps { - uint32_t rb_mask; -}; - /* * oob layout for large page size * bad block info is on bytes 0 and 1 @@ -129,7 +125,6 @@ struct atmel_nfc { /* Point to the sram bank which include readed data via NFC */ void *data_in_sram; bool will_write_sram; - const struct atmel_nand_nfc_caps *caps; }; static struct atmel_nfc nand_nfc; @@ -1715,9 +1710,9 @@ static irqreturn_t hsmc_interrupt(int irq, void *dev_id) nfc_writel(host->nfc->hsmc_regs, IDR, NFC_SR_XFR_DONE); ret = IRQ_HANDLED; } - if (pending & host->nfc->caps->rb_mask) { + if (pending & NFC_SR_RB_EDGE) { complete(&host->nfc->comp_ready); - nfc_writel(host->nfc->hsmc_regs, IDR, host->nfc->caps->rb_mask); + nfc_writel(host->nfc->hsmc_regs, IDR, NFC_SR_RB_EDGE); ret = IRQ_HANDLED; } if (pending & NFC_SR_CMD_DONE) { @@ -1735,7 +1730,7 @@ static void nfc_prepare_interrupt(struct atmel_nand_host *host, u32 flag) if (flag & NFC_SR_XFR_DONE) init_completion(&host->nfc->comp_xfer_done); - if (flag & host->nfc->caps->rb_mask) + if (flag & NFC_SR_RB_EDGE) init_completion(&host->nfc->comp_ready); if (flag & NFC_SR_CMD_DONE) @@ -1753,7 +1748,7 @@ static int nfc_wait_interrupt(struct atmel_nand_host *host, u32 flag) if (flag & NFC_SR_XFR_DONE) comp[index++] = &host->nfc->comp_xfer_done; - if (flag & host->nfc->caps->rb_mask) + if (flag & NFC_SR_RB_EDGE) comp[index++] = &host->nfc->comp_ready; if (flag & NFC_SR_CMD_DONE) @@ -1821,7 +1816,7 @@ static int nfc_device_ready(struct mtd_info *mtd) dev_err(host->dev, "Lost the interrupt flags: 0x%08x\n", mask & status); - return status & host->nfc->caps->rb_mask; + return status & NFC_SR_RB_EDGE; } static void nfc_select_chip(struct mtd_info *mtd, int chip) @@ -1994,8 +1989,8 @@ static void nfc_nand_command(struct mtd_info *mtd, unsigned int command, } /* fall through */ default: - nfc_prepare_interrupt(host, host->nfc->caps->rb_mask); - nfc_wait_interrupt(host, host->nfc->caps->rb_mask); + nfc_prepare_interrupt(host, NFC_SR_RB_EDGE); + nfc_wait_interrupt(host, NFC_SR_RB_EDGE); } } @@ -2426,11 +2421,6 @@ static int atmel_nand_nfc_probe(struct platform_device *pdev) } } - nfc->caps = (const struct atmel_nand_nfc_caps *) - of_device_get_match_data(&pdev->dev); - if (!nfc->caps) - return -ENODEV; - nfc_writel(nfc->hsmc_regs, IDR, 0xffffffff); nfc_readl(nfc->hsmc_regs, SR); /* clear the NFC_SR */ @@ -2459,17 +2449,8 @@ static int atmel_nand_nfc_remove(struct platform_device *pdev) return 0; } -static const struct atmel_nand_nfc_caps sama5d3_nfc_caps = { - .rb_mask = NFC_SR_RB_EDGE0, -}; - -static const struct atmel_nand_nfc_caps sama5d4_nfc_caps = { - .rb_mask = NFC_SR_RB_EDGE3, -}; - static const struct of_device_id atmel_nand_nfc_match[] = { - { .compatible = "atmel,sama5d3-nfc", .data = &sama5d3_nfc_caps }, - { .compatible = "atmel,sama5d4-nfc", .data = &sama5d4_nfc_caps }, + { .compatible = "atmel,sama5d3-nfc" }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, atmel_nand_nfc_match); diff --git a/drivers/mtd/nand/atmel_nand_nfc.h b/drivers/mtd/nand/atmel_nand_nfc.h index 0bbc1fa..4d5d262 100644 --- a/drivers/mtd/nand/atmel_nand_nfc.h +++ b/drivers/mtd/nand/atmel_nand_nfc.h @@ -42,8 +42,7 @@ #define NFC_SR_UNDEF (1 << 21) #define NFC_SR_AWB (1 << 22) #define NFC_SR_ASE (1 << 23) -#define NFC_SR_RB_EDGE0 (1 << 24) -#define NFC_SR_RB_EDGE3 (1 << 27) +#define NFC_SR_RB_EDGE (1 << 24) #define ATMEL_HSMC_NFC_IER 0x0c #define ATMEL_HSMC_NFC_IDR 0x10
This reverts commit 5ddc7bd43ccc ("mtd: atmel_nand: Support variable RB_EDGE interrupts") Because for current SoCs, the RB_EDGE3(i.e. bit 27) of HSMC_SR register does not exist, the RB_EDGE0 (i.e. bit 24) is the ready/busy line edge status bit. It is a datasheet bug. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> --- .../devicetree/bindings/mtd/atmel-nand.txt | 2 +- drivers/mtd/nand/atmel_nand.c | 35 +++++----------------- drivers/mtd/nand/atmel_nand_nfc.h | 3 +- 3 files changed, 10 insertions(+), 30 deletions(-)