diff mbox

[02/10] ppc: Create cpu_ppc_set_papr() helper (for LPCR)

Message ID 1465795496-15071-3-git-send-email-clg@kaod.org (mailing list archive)
State New, archived
Headers show

Commit Message

Cédric Le Goater June 13, 2016, 5:24 a.m. UTC
From: Benjamin Herrenschmidt <benh@kernel.crashing.org>

And move the code adjusting the MSR mask and calling kvmppc_set_papr()
to it. This allows us to add a few more things such as disabling setting
of MSR:HV and appropriate LPCR bits which will be used when fixing
the exception model.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
[clg: previous commit 26a7f1291bb5 did not include the LPCR setting as
      it was not needed at the time ]
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
 target-ppc/translate_init.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

Comments

David Gibson June 14, 2016, 6:15 a.m. UTC | #1
On Mon, Jun 13, 2016 at 07:24:48AM +0200, Cédric Le Goater wrote:
> From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> 
> And move the code adjusting the MSR mask and calling kvmppc_set_papr()
> to it. This allows us to add a few more things such as disabling setting
> of MSR:HV and appropriate LPCR bits which will be used when fixing
> the exception model.
> 
> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
> [clg: previous commit 26a7f1291bb5 did not include the LPCR setting as
>       it was not needed at the time ]

I see how this came about, but it means the commit message (both long
and short) is confusingly mismatched from the code now.

> Signed-off-by: Cédric Le Goater <clg@kaod.org>
> ---
>  target-ppc/translate_init.c | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
> 
> diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
> index ca894ff4af45..edfd91a85425 100644
> --- a/target-ppc/translate_init.c
> +++ b/target-ppc/translate_init.c
> @@ -8509,6 +8509,7 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data)
>  void cpu_ppc_set_papr(PowerPCCPU *cpu)
>  {
>      CPUPPCState *env = &cpu->env;
> +    ppc_spr_t *lpcr = &env->spr_cb[SPR_LPCR];
>      ppc_spr_t *amor = &env->spr_cb[SPR_AMOR];
>  
>      /* PAPR always has exception vectors in RAM not ROM. To ensure this,
> @@ -8518,6 +8519,19 @@ void cpu_ppc_set_papr(PowerPCCPU *cpu)
>       */
>      env->msr_mask &= ~((1ull << MSR_EP) | MSR_HVB);
>  
> +    /* Set emulated LPCR to not send interrupts to hypervisor. Note that
> +     * under KVM, the actual HW LPCR will be set differently by KVM itself,
> +     * the settings below ensure proper operations with TCG in absence of
> +     * a real hypervisor
> +     */
> +    lpcr->default_value &= ~(LPCR_VPM0 | LPCR_VPM1 | LPCR_ISL | LPCR_KBV);
> +    lpcr->default_value |= LPCR_LPES0 | LPCR_LPES1;
> +
> +    /* We should be followed by a CPU reset but update the active value
> +     * just in case...
> +     */
> +    env->spr[SPR_LPCR] = lpcr->default_value;
> +
>      /* Set a full AMOR so guest can use the AMR as it sees fit */
>      env->spr[SPR_AMOR] = amor->default_value = 0xffffffffffffffffull;
>
Cédric Le Goater June 14, 2016, 6:52 a.m. UTC | #2
On 06/14/2016 08:15 AM, David Gibson wrote:
> On Mon, Jun 13, 2016 at 07:24:48AM +0200, Cédric Le Goater wrote:
>> From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
>>
>> And move the code adjusting the MSR mask and calling kvmppc_set_papr()
>> to it. This allows us to add a few more things such as disabling setting
>> of MSR:HV and appropriate LPCR bits which will be used when fixing
>> the exception model.
>>
>> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
>> Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
>> [clg: previous commit 26a7f1291bb5 did not include the LPCR setting as
>>       it was not needed at the time ]
> 
> I see how this came about, but it means the commit message (both long
> and short) is confusingly mismatched from the code now.

OK. I will work on it.

For my education, how much can we change the initial changelog of a patch ?
Is it considered as part of the code ? 

Thanks,

C.
David Gibson June 15, 2016, 1:01 a.m. UTC | #3
On Tue, Jun 14, 2016 at 08:52:12AM +0200, Cédric Le Goater wrote:
> On 06/14/2016 08:15 AM, David Gibson wrote:
> > On Mon, Jun 13, 2016 at 07:24:48AM +0200, Cédric Le Goater wrote:
> >> From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> >>
> >> And move the code adjusting the MSR mask and calling kvmppc_set_papr()
> >> to it. This allows us to add a few more things such as disabling setting
> >> of MSR:HV and appropriate LPCR bits which will be used when fixing
> >> the exception model.
> >>
> >> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> >> Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
> >> [clg: previous commit 26a7f1291bb5 did not include the LPCR setting as
> >>       it was not needed at the time ]
> > 
> > I see how this came about, but it means the commit message (both long
> > and short) is confusingly mismatched from the code now.
> 
> OK. I will work on it.
> 
> For my education, how much can we change the initial changelog of a patch ?
> Is it considered as part of the code ? 

I'm not entirely sure I follow the question, but AFAIK it's entirely
ok to reword and clarify a commit message as it moves through the
signed-off-by chain.
diff mbox

Patch

diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index ca894ff4af45..edfd91a85425 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -8509,6 +8509,7 @@  POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data)
 void cpu_ppc_set_papr(PowerPCCPU *cpu)
 {
     CPUPPCState *env = &cpu->env;
+    ppc_spr_t *lpcr = &env->spr_cb[SPR_LPCR];
     ppc_spr_t *amor = &env->spr_cb[SPR_AMOR];
 
     /* PAPR always has exception vectors in RAM not ROM. To ensure this,
@@ -8518,6 +8519,19 @@  void cpu_ppc_set_papr(PowerPCCPU *cpu)
      */
     env->msr_mask &= ~((1ull << MSR_EP) | MSR_HVB);
 
+    /* Set emulated LPCR to not send interrupts to hypervisor. Note that
+     * under KVM, the actual HW LPCR will be set differently by KVM itself,
+     * the settings below ensure proper operations with TCG in absence of
+     * a real hypervisor
+     */
+    lpcr->default_value &= ~(LPCR_VPM0 | LPCR_VPM1 | LPCR_ISL | LPCR_KBV);
+    lpcr->default_value |= LPCR_LPES0 | LPCR_LPES1;
+
+    /* We should be followed by a CPU reset but update the active value
+     * just in case...
+     */
+    env->spr[SPR_LPCR] = lpcr->default_value;
+
     /* Set a full AMOR so guest can use the AMR as it sees fit */
     env->spr[SPR_AMOR] = amor->default_value = 0xffffffffffffffffull;