Message ID | 1465915112-29272-9-git-send-email-peter.maydell@linaro.org (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On 2016/6/14 22:38, Peter Maydell wrote: > From: Pavel Fedin <p.fedin@samsung.com> > > Add state structure descriptors for the GICv3 state. We mark > the KVM GICv3 device as having a migration blocker until the > code to save and restore the state in the kernel is implemented. > > Signed-off-by: Pavel Fedin <p.fedin@samsung.com> > [PMM: Adjust to renamed struct fields; switched to using uint32_t > array backed bitmaps; add migration blocker setting] > Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Shannon Zhao <shannon.zhao@linaro.org> > --- > hw/intc/arm_gicv3_common.c | 50 +++++++++++++++++++++++++++++++++++++++++++++- > hw/intc/arm_gicv3_kvm.c | 7 +++++++ > 2 files changed, 56 insertions(+), 1 deletion(-) > > diff --git a/hw/intc/arm_gicv3_common.c b/hw/intc/arm_gicv3_common.c > index 1557833..d1714e4 100644 > --- a/hw/intc/arm_gicv3_common.c > +++ b/hw/intc/arm_gicv3_common.c > @@ -49,11 +49,59 @@ static int gicv3_post_load(void *opaque, int version_id) > return 0; > } > > +static const VMStateDescription vmstate_gicv3_cpu = { > + .name = "arm_gicv3_cpu", > + .version_id = 1, > + .minimum_version_id = 1, > + .fields = (VMStateField[]) { > + VMSTATE_UINT32(level, GICv3CPUState), > + VMSTATE_UINT32(gicr_ctlr, GICv3CPUState), > + VMSTATE_UINT32_ARRAY(gicr_statusr, GICv3CPUState, 2), > + VMSTATE_UINT32(gicr_waker, GICv3CPUState), > + VMSTATE_UINT64(gicr_propbaser, GICv3CPUState), > + VMSTATE_UINT64(gicr_pendbaser, GICv3CPUState), > + VMSTATE_UINT32(gicr_igroupr0, GICv3CPUState), > + VMSTATE_UINT32(gicr_ienabler0, GICv3CPUState), > + VMSTATE_UINT32(gicr_ipendr0, GICv3CPUState), > + VMSTATE_UINT32(gicr_iactiver0, GICv3CPUState), > + VMSTATE_UINT32(edge_trigger, GICv3CPUState), > + VMSTATE_UINT32(gicr_igrpmodr0, GICv3CPUState), > + VMSTATE_UINT32(gicr_nsacr, GICv3CPUState), > + VMSTATE_UINT8_ARRAY(gicr_ipriorityr, GICv3CPUState, GIC_INTERNAL), > + VMSTATE_UINT64_ARRAY(icc_ctlr_el1, GICv3CPUState, 2), > + VMSTATE_UINT64(icc_pmr_el1, GICv3CPUState), > + VMSTATE_UINT64_ARRAY(icc_bpr, GICv3CPUState, 3), > + VMSTATE_UINT64_2DARRAY(icc_apr, GICv3CPUState, 3, 4), > + VMSTATE_UINT64_ARRAY(icc_igrpen, GICv3CPUState, 3), > + VMSTATE_UINT64(icc_ctlr_el3, GICv3CPUState), > + VMSTATE_END_OF_LIST() > + } > +}; > + > static const VMStateDescription vmstate_gicv3 = { > .name = "arm_gicv3", > - .unmigratable = 1, > + .version_id = 1, > + .minimum_version_id = 1, > .pre_save = gicv3_pre_save, > .post_load = gicv3_post_load, > + .fields = (VMStateField[]) { > + VMSTATE_UINT32(gicd_ctlr, GICv3State), > + VMSTATE_UINT32_ARRAY(gicd_statusr, GICv3State, 2), > + VMSTATE_UINT32_ARRAY(group, GICv3State, GICV3_BMP_SIZE), > + VMSTATE_UINT32_ARRAY(grpmod, GICv3State, GICV3_BMP_SIZE), > + VMSTATE_UINT32_ARRAY(enabled, GICv3State, GICV3_BMP_SIZE), > + VMSTATE_UINT32_ARRAY(pending, GICv3State, GICV3_BMP_SIZE), > + VMSTATE_UINT32_ARRAY(active, GICv3State, GICV3_BMP_SIZE), > + VMSTATE_UINT32_ARRAY(level, GICv3State, GICV3_BMP_SIZE), > + VMSTATE_UINT32_ARRAY(edge_trigger, GICv3State, GICV3_BMP_SIZE), > + VMSTATE_UINT8_ARRAY(gicd_ipriority, GICv3State, GICV3_MAXIRQ), > + VMSTATE_UINT64_ARRAY(gicd_irouter, GICv3State, GICV3_MAXIRQ), > + VMSTATE_UINT32_ARRAY(gicd_nsacr, GICv3State, > + DIV_ROUND_UP(GICV3_MAXIRQ, 16)), > + VMSTATE_STRUCT_VARRAY_POINTER_UINT32(cpu, GICv3State, num_cpu, > + vmstate_gicv3_cpu, GICv3CPUState), > + VMSTATE_END_OF_LIST() > + } > }; > > void gicv3_init_irqs_and_mmio(GICv3State *s, qemu_irq_handler handler, > diff --git a/hw/intc/arm_gicv3_kvm.c b/hw/intc/arm_gicv3_kvm.c > index acc1730..d08808d 100644 > --- a/hw/intc/arm_gicv3_kvm.c > +++ b/hw/intc/arm_gicv3_kvm.c > @@ -119,6 +119,13 @@ static void kvm_arm_gicv3_realize(DeviceState *dev, Error **errp) > KVM_VGIC_V3_ADDR_TYPE_DIST, s->dev_fd); > kvm_arm_register_device(&s->iomem_redist, -1, KVM_DEV_ARM_VGIC_GRP_ADDR, > KVM_VGIC_V3_ADDR_TYPE_REDIST, s->dev_fd); > + > + /* Block migration of a KVM GICv3 device: the API for saving and restoring > + * the state in the kernel is not yet finalised in the kernel or > + * implemented in QEMU. > + */ > + error_setg(&s->migration_blocker, "vGICv3 migration is not implemented"); > + migrate_add_blocker(s->migration_blocker); > } > > static void kvm_arm_gicv3_class_init(ObjectClass *klass, void *data) >
On 2016/6/14 22:38, Peter Maydell wrote: > diff --git a/hw/intc/arm_gicv3_kvm.c b/hw/intc/arm_gicv3_kvm.c > index acc1730..d08808d 100644 > --- a/hw/intc/arm_gicv3_kvm.c > +++ b/hw/intc/arm_gicv3_kvm.c miss adding #include "migration/migration.h" otherwise there is a compiling error: error: implicit declaration of function 'migrate_add_blocker' [-Werror=implicit-function-declaration] > @@ -119,6 +119,13 @@ static void kvm_arm_gicv3_realize(DeviceState *dev, Error **errp) > KVM_VGIC_V3_ADDR_TYPE_DIST, s->dev_fd); > kvm_arm_register_device(&s->iomem_redist, -1, KVM_DEV_ARM_VGIC_GRP_ADDR, > KVM_VGIC_V3_ADDR_TYPE_REDIST, s->dev_fd); > + > + /* Block migration of a KVM GICv3 device: the API for saving and restoring > + * the state in the kernel is not yet finalised in the kernel or > + * implemented in QEMU. > + */ > + error_setg(&s->migration_blocker, "vGICv3 migration is not implemented"); > + migrate_add_blocker(s->migration_blocker); > } > > static void kvm_arm_gicv3_class_init(ObjectClass *klass, void *data) >
On 16 June 2016 at 03:12, Shannon Zhao <zhaoshenglong@huawei.com> wrote: > On 2016/6/14 22:38, Peter Maydell wrote: >> diff --git a/hw/intc/arm_gicv3_kvm.c b/hw/intc/arm_gicv3_kvm.c >> index acc1730..d08808d 100644 >> --- a/hw/intc/arm_gicv3_kvm.c >> +++ b/hw/intc/arm_gicv3_kvm.c > > miss adding #include "migration/migration.h" > otherwise there is a compiling error: > error: implicit declaration of function 'migrate_add_blocker' > [-Werror=implicit-function-declaration] Oops, thanks. Since this was the only problem I've just added the missing #include and will put this now completely-reviewed v3 patchset into target-arm.next, rather than sending a v4. Thanks for reviewing this! -- PMM
diff --git a/hw/intc/arm_gicv3_common.c b/hw/intc/arm_gicv3_common.c index 1557833..d1714e4 100644 --- a/hw/intc/arm_gicv3_common.c +++ b/hw/intc/arm_gicv3_common.c @@ -49,11 +49,59 @@ static int gicv3_post_load(void *opaque, int version_id) return 0; } +static const VMStateDescription vmstate_gicv3_cpu = { + .name = "arm_gicv3_cpu", + .version_id = 1, + .minimum_version_id = 1, + .fields = (VMStateField[]) { + VMSTATE_UINT32(level, GICv3CPUState), + VMSTATE_UINT32(gicr_ctlr, GICv3CPUState), + VMSTATE_UINT32_ARRAY(gicr_statusr, GICv3CPUState, 2), + VMSTATE_UINT32(gicr_waker, GICv3CPUState), + VMSTATE_UINT64(gicr_propbaser, GICv3CPUState), + VMSTATE_UINT64(gicr_pendbaser, GICv3CPUState), + VMSTATE_UINT32(gicr_igroupr0, GICv3CPUState), + VMSTATE_UINT32(gicr_ienabler0, GICv3CPUState), + VMSTATE_UINT32(gicr_ipendr0, GICv3CPUState), + VMSTATE_UINT32(gicr_iactiver0, GICv3CPUState), + VMSTATE_UINT32(edge_trigger, GICv3CPUState), + VMSTATE_UINT32(gicr_igrpmodr0, GICv3CPUState), + VMSTATE_UINT32(gicr_nsacr, GICv3CPUState), + VMSTATE_UINT8_ARRAY(gicr_ipriorityr, GICv3CPUState, GIC_INTERNAL), + VMSTATE_UINT64_ARRAY(icc_ctlr_el1, GICv3CPUState, 2), + VMSTATE_UINT64(icc_pmr_el1, GICv3CPUState), + VMSTATE_UINT64_ARRAY(icc_bpr, GICv3CPUState, 3), + VMSTATE_UINT64_2DARRAY(icc_apr, GICv3CPUState, 3, 4), + VMSTATE_UINT64_ARRAY(icc_igrpen, GICv3CPUState, 3), + VMSTATE_UINT64(icc_ctlr_el3, GICv3CPUState), + VMSTATE_END_OF_LIST() + } +}; + static const VMStateDescription vmstate_gicv3 = { .name = "arm_gicv3", - .unmigratable = 1, + .version_id = 1, + .minimum_version_id = 1, .pre_save = gicv3_pre_save, .post_load = gicv3_post_load, + .fields = (VMStateField[]) { + VMSTATE_UINT32(gicd_ctlr, GICv3State), + VMSTATE_UINT32_ARRAY(gicd_statusr, GICv3State, 2), + VMSTATE_UINT32_ARRAY(group, GICv3State, GICV3_BMP_SIZE), + VMSTATE_UINT32_ARRAY(grpmod, GICv3State, GICV3_BMP_SIZE), + VMSTATE_UINT32_ARRAY(enabled, GICv3State, GICV3_BMP_SIZE), + VMSTATE_UINT32_ARRAY(pending, GICv3State, GICV3_BMP_SIZE), + VMSTATE_UINT32_ARRAY(active, GICv3State, GICV3_BMP_SIZE), + VMSTATE_UINT32_ARRAY(level, GICv3State, GICV3_BMP_SIZE), + VMSTATE_UINT32_ARRAY(edge_trigger, GICv3State, GICV3_BMP_SIZE), + VMSTATE_UINT8_ARRAY(gicd_ipriority, GICv3State, GICV3_MAXIRQ), + VMSTATE_UINT64_ARRAY(gicd_irouter, GICv3State, GICV3_MAXIRQ), + VMSTATE_UINT32_ARRAY(gicd_nsacr, GICv3State, + DIV_ROUND_UP(GICV3_MAXIRQ, 16)), + VMSTATE_STRUCT_VARRAY_POINTER_UINT32(cpu, GICv3State, num_cpu, + vmstate_gicv3_cpu, GICv3CPUState), + VMSTATE_END_OF_LIST() + } }; void gicv3_init_irqs_and_mmio(GICv3State *s, qemu_irq_handler handler, diff --git a/hw/intc/arm_gicv3_kvm.c b/hw/intc/arm_gicv3_kvm.c index acc1730..d08808d 100644 --- a/hw/intc/arm_gicv3_kvm.c +++ b/hw/intc/arm_gicv3_kvm.c @@ -119,6 +119,13 @@ static void kvm_arm_gicv3_realize(DeviceState *dev, Error **errp) KVM_VGIC_V3_ADDR_TYPE_DIST, s->dev_fd); kvm_arm_register_device(&s->iomem_redist, -1, KVM_DEV_ARM_VGIC_GRP_ADDR, KVM_VGIC_V3_ADDR_TYPE_REDIST, s->dev_fd); + + /* Block migration of a KVM GICv3 device: the API for saving and restoring + * the state in the kernel is not yet finalised in the kernel or + * implemented in QEMU. + */ + error_setg(&s->migration_blocker, "vGICv3 migration is not implemented"); + migrate_add_blocker(s->migration_blocker); } static void kvm_arm_gicv3_class_init(ObjectClass *klass, void *data)