diff mbox

[RFC,13/13] arm64: tegra: Add DPAUX pinctrl bindings

Message ID 1466165027-17917-14-git-send-email-jonathanh@nvidia.com (mailing list archive)
State New, archived
Headers show

Commit Message

Jon Hunter June 17, 2016, 12:03 p.m. UTC
Add the DPAUX pinctrl states for the DPAUX nodes defining all three
possible states of "aux", "i2c" and "off". Also add the 'i2c-bus'
node for the DPAUX nodes so that the I2C driver core does not attempt
to parse the pinctrl state nodes.

Populate the nodes for the pinctrl clients of the DPAUX pin controller.
There are two clients for each DPAUX instance, namely the SOR and one of
the I2C adapters. The SOR clients may used the DPAUX pins in either AUX
or I2C modes and so for these devices we don't define any of the generic
pinctrl states (default, idle, etc) because the SOR driver will directly
set the state needed. For I2C clients only the I2C mode is used and so
we can simplify matters by using the generic pinctrl states for default
and idle.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
---
 arch/arm64/boot/dts/nvidia/tegra210.dtsi | 48 ++++++++++++++++++++++++++++++++
 1 file changed, 48 insertions(+)

Comments

Thierry Reding June 17, 2016, 4:50 p.m. UTC | #1
On Fri, Jun 17, 2016 at 01:03:47PM +0100, Jon Hunter wrote:
> Add the DPAUX pinctrl states for the DPAUX nodes defining all three
> possible states of "aux", "i2c" and "off". Also add the 'i2c-bus'
> node for the DPAUX nodes so that the I2C driver core does not attempt
> to parse the pinctrl state nodes.
> 
> Populate the nodes for the pinctrl clients of the DPAUX pin controller.
> There are two clients for each DPAUX instance, namely the SOR and one of
> the I2C adapters. The SOR clients may used the DPAUX pins in either AUX
> or I2C modes and so for these devices we don't define any of the generic
> pinctrl states (default, idle, etc) because the SOR driver will directly
> set the state needed. For I2C clients only the I2C mode is used and so
> we can simplify matters by using the generic pinctrl states for default
> and idle.
> 
> Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
> ---
>  arch/arm64/boot/dts/nvidia/tegra210.dtsi | 48 ++++++++++++++++++++++++++++++++
>  1 file changed, 48 insertions(+)

Looks good to me. Thanks for driving this to conclusion.

Thierry
Linus Walleij June 23, 2016, 7:46 a.m. UTC | #2
On Fri, Jun 17, 2016 at 2:03 PM, Jon Hunter <jonathanh@nvidia.com> wrote:

> Add the DPAUX pinctrl states for the DPAUX nodes defining all three
> possible states of "aux", "i2c" and "off". Also add the 'i2c-bus'
> node for the DPAUX nodes so that the I2C driver core does not attempt
> to parse the pinctrl state nodes.
>
> Populate the nodes for the pinctrl clients of the DPAUX pin controller.
> There are two clients for each DPAUX instance, namely the SOR and one of
> the I2C adapters. The SOR clients may used the DPAUX pins in either AUX
> or I2C modes and so for these devices we don't define any of the generic
> pinctrl states (default, idle, etc) because the SOR driver will directly
> set the state needed. For I2C clients only the I2C mode is used and so
> we can simplify matters by using the generic pinctrl states for default
> and idle.
>
> Signed-off-by: Jon Hunter <jonathanh@nvidia.com>

Acked-by: Linus Walleij <linus.walleij@linaro.org>

Yours
Linus Walleij
diff mbox

Patch

diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
index 78bcc87b627d..c4ae0215291a 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
@@ -37,6 +37,23 @@ 
 			reset-names = "dpaux";
 			power-domains = <&pd_sor>;
 			status = "disabled";
+
+			state_dpaux1_aux: pinmux_aux {
+				groups = "dpaux-io";
+				function = "aux";
+			};
+
+			state_dpaux1_i2c: pinmux_i2c {
+				groups = "dpaux-io";
+				function = "i2c";
+			};
+
+			state_dpaux1_off: pinmux_off {
+				groups = "dpaux-io";
+				function = "off";
+			};
+
+			i2c-bus { };
 		};
 
 		vi@54080000 {
@@ -156,6 +173,10 @@ 
 			clock-names = "sor", "parent", "dp", "safe";
 			resets = <&tegra_car 182>;
 			reset-names = "sor";
+			pinctrl-0 = <&state_dpaux_aux>;
+			pinctrl-1 = <&state_dpaux_i2c>;
+			pinctrl-2 = <&state_dpaux_off>;
+			pinctrl-names = "aux", "i2c", "off";
 			power-domains = <&pd_sor>;
 			status = "disabled";
 		};
@@ -171,6 +192,10 @@ 
 			clock-names = "sor", "parent", "dp", "safe";
 			resets = <&tegra_car 183>;
 			reset-names = "sor";
+			pinctrl-0 = <&state_dpaux1_aux>;
+			pinctrl-1 = <&state_dpaux1_i2c>;
+			pinctrl-2 = <&state_dpaux1_off>;
+			pinctrl-names = "aux", "i2c", "off";
 			power-domains = <&pd_sor>;
 			status = "disabled";
 		};
@@ -187,6 +212,23 @@ 
 			reset-names = "dpaux";
 			power-domains = <&pd_sor>;
 			status = "disabled";
+
+			state_dpaux_aux: pinmux_aux {
+				groups = "dpaux-io";
+				function = "aux";
+			};
+
+			state_dpaux_i2c: pinmux_i2c {
+				groups = "dpaux-io";
+				function = "i2c";
+			};
+
+			state_dpaux_off: pinmux_off {
+				groups = "dpaux-io";
+				function = "off";
+			};
+
+			i2c-bus { };
 		};
 
 		isp@54600000 {
@@ -484,6 +526,9 @@ 
 		reset-names = "i2c";
 		dmas = <&apbdma 26>, <&apbdma 26>;
 		dma-names = "rx", "tx";
+		pinctrl-0 = <&state_dpaux1_i2c>;
+		pinctrl-1 = <&state_dpaux1_off>;
+		pinctrl-names = "default", "idle";
 		status = "disabled";
 	};
 
@@ -514,6 +559,9 @@ 
 		reset-names = "i2c";
 		dmas = <&apbdma 30>, <&apbdma 30>;
 		dma-names = "rx", "tx";
+		pinctrl-0 = <&state_dpaux_i2c>;
+		pinctrl-1 = <&state_dpaux_off>;
+		pinctrl-names = "default", "idle";
 		status = "disabled";
 	};